Freescale Semiconductor
Technical Data
Document Number: MRF7S19210H
Rev. 1, 3/2011
RF Power Field Effect Transistors
N--Channel Enhancement--Mode Lateral MOSFETs
Designed for CDMA base station applications with frequencies from 1930 to
1990 MHz. Can be used in Class AB and Class C for all typical cellular base
station modulation formats.
•
Typical Single--Carrier W--CDMA Performance: V
DD
= 28 Volts, I
DQ
=
1400 mA, P
out
= 63 Watts Avg., f = 1987.5 MHz, IQ Magnitude Clipping,
Channel Bandwidth = 3.84 MHz, Input Signal PAR = 7.5 dB @ 0.01%
Probability on CCDF.
Power Gain — 20 dB
Drain Efficiency — 29%
Device Output Signal PAR — 5.9 dB @ 0.01% Probability on CCDF
ACPR @ 5 MHz Offset — --33 dBc in 3.84 MHz Channel Bandwidth
•
Capable of Handling 5:1 VSWR, @ 32 Vdc, 1960 MHz, 190 Watts CW
Output Power (3 dB Input Overdrive from Rated P
out
)
•
Typical P
out
@ 1 dB Compression Point
≃
190 Watts CW
Features
•
100% PAR Tested for Guaranteed Output Power Capability
•
Characterized with Series Equivalent Large--Signal Impedance Parameters
•
Internally Matched for Ease of Use
•
Integrated ESD Protection
•
Greater Negative Gate--Source Voltage Range for Improved Class C
Operation
•
Designed for Digital Predistortion Error Correction Systems
•
RoHS Compliant
•
In Tape and Reel. R3 Suffix = 250 Units, 56 mm Tape Width, 13 inch Reel.
MRF7S19210HR3
MRF7S19210HSR3
1930-
-1990 MHz, 63 W AVG., 28 V
SINGLE W-
-CDMA
LATERAL N-
-CHANNEL
RF POWER MOSFETs
CASE 465-
-06, STYLE 1
NI-
-780
MRF7S19210HR3
CASE 465A-
-06, STYLE 1
NI-
-780S
MRF7S19210HSR3
Table 1. Maximum Ratings
Rating
Drain--Source Voltage
Gate--Source Voltage
Operating Voltage
Storage Temperature Range
Case Operating Temperature
Operating Junction Temperature
(1,2)
Symbol
V
DSS
V
GS
V
DD
T
stg
T
C
T
J
Value
--0.5, +65
--6.0, +10
32, +0
--65 to +150
150
225
Unit
Vdc
Vdc
Vdc
°C
°C
°C
Table 2. Thermal Characteristics
Characteristic
Thermal Resistance, Junction to Case
Case Temperature 85°C, 190 W CW
Case Temperature 79°C, 63 W CW
Symbol
R
θJC
Value
(2,3)
0.34
0.38
Unit
°C/W
1. Continuous use at maximum temperature will affect MTTF.
2. MTTF calculator available at http://www.freescale.com/rf. Select Software & Tools/Development Tools/Calculators to access MTTF
calculators by product.
3. Refer to AN1955,
Thermal Measurement Methodology of RF Power Amplifiers.
Go to http://www.freescale.com/rf.
Select Documentation/Application Notes -- AN1955.
©
Freescale Semiconductor, Inc., 2008, 2011. All rights reserved.
MRF7S19210HR3 MRF7S19210HSR3
1
RF Device Data
Freescale Semiconductor
Table 3. ESD Protection Characteristics
Test Methodology
Human Body Model (per JESD22--A114)
Machine Model (per EIA/JESD22--A115)
Charge Device Model (per JESD22--C101)
Class
1C (Minimum)
A (Minimum)
IV (Minimum)
Table 4. Electrical Characteristics
(T
A
= 25°C unless otherwise noted)
Characteristic
Off Characteristics
Zero Gate Voltage Drain Leakage Current
(V
DS
= 65 Vdc, V
GS
= 0 Vdc)
Zero Gate Voltage Drain Leakage Current
(V
DS
= 28 Vdc, V
GS
= 0 Vdc)
Gate--Source Leakage Current
(V
GS
= 5 Vdc, V
DS
= 0 Vdc)
On Characteristics
Gate Threshold Voltage
(V
DS
= 10 Vdc, I
D
= 513
μAdc)
Gate Quiescent Voltage
(V
DS
= 28 Vdc, I
D
= 1400 mAdc)
Fixture Gate Quiescent Voltage
(1)
(V
DD
= 28 Vdc, I
D
= 1400 mAdc, Measured in Functional Test)
Drain--Source On--Voltage
(V
GS
= 10 Vdc, I
D
= 5.13 Adc)
Dynamic Characteristics
(2)
Reverse Transfer Capacitance
(V
DS
= 28 Vdc
±
30 mV(rms)ac @ 1 MHz, V
GS
= 0 Vdc)
Output Capacitance
(V
DS
= 28 Vdc
±
30 mV(rms)ac @ 1 MHz, V
GS
= 0 Vdc)
Input Capacitance
(V
DS
= 28 Vdc, V
GS
= 0 Vdc
±
30 mV(rms)ac @ 1 MHz)
C
rss
C
oss
C
iss
—
—
—
2.17
257
508
—
—
—
pF
pF
pF
V
GS(th)
V
GS(Q)
V
GG(Q)
V
DS(on)
1.2
—
4
0.1
2
2.7
5.4
0.2
2.7
—
7
0.3
Vdc
Vdc
Vdc
Vdc
I
DSS
I
DSS
I
GSS
—
—
—
—
—
—
10
1
1
μAdc
μAdc
μAdc
Symbol
Min
Typ
Max
Unit
Functional Tests
(In Freescale Test Fixture, 50 ohm system) V
DD
= 28 Vdc, I
DQ
= 1400 mA, P
out
= 63 W Avg., f = 1987.5 MHz,
Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal PAR = 7.5 dB @ 0.01% Probability on CCDF. ACPR measured in 3.84 MHz
Channel Bandwidth @
±5
MHz Offset.
Power Gain
Drain Efficiency
Output Peak--to--Average Ratio @ 0.01% Probability on CCDF
Adjacent Channel Power Ratio
Input Return Loss
G
ps
η
D
PAR
ACPR
IRL
18
26
5.5
—
—
20
29
5.9
--33
--9.5
21.5
—
—
--31
--6
dB
%
dB
dBc
dB
1. V
GG
= 2 x V
GS(Q)
. Parameter measured on Freescale Test Fixture, due to resistive divider network on the board. Refer to Test Circuit
schematic.
2. Part internally matched both on input and output.
(continued)
MRF7S19210HR3 MRF7S19210HSR3
2
RF Device Data
Freescale Semiconductor
Table 4. Electrical Characteristics
(T
A
= 25°C unless otherwise noted)
(continued)
Characteristic
IMD Symmetry @ 160 W PEP, P
out
where IMD Third Order
Intermodulation
30 dBc
(Delta IMD Third Order Intermodulation between Upper and Lower
Sidebands > 2 dB)
VBW Resonance Point
(IMD Third Order Intermodulation Inflection Point)
Gain Flatness in 60 MHz Bandwidth @ P
out
= 63 W Avg.
Average Deviation from Linear Phase in 60 MHz Bandwidth
@ P
out
= 190 W CW
Average Group Delay @ P
out
= 190 W CW, f = 1960 MHz
Part--to--Part Insertion Phase Variation @ P
out
= 190 W CW,
f = 1960 MHz, Six Sigma Window
Gain Variation over Temperature
(--30°C to +85°C)
Output Power Variation over Temperature
(--30°C to +85°C)
Symbol
IMD
sym
Min
Typ
Max
Unit
MHz
—
15
—
Typical Performances
(In Freescale Test Fixture, 50 ohm system) V
DD
= 28 Vdc, I
DQ
= 1400 mA, 1930--1990 MHz Bandwidth
VBW
res
G
F
Φ
Delay
∆Φ
∆G
∆P1dB
—
—
—
—
—
—
—
50
0.9
0.95
2.82
28.9
0.019
0.008
—
—
—
—
—
—
—
MHz
dB
°
ns
°
dB/°C
dB/°C
MRF7S19210HR3 MRF7S19210HSR3
RF Device Data
Freescale Semiconductor
3
V
BIAS
R1
R2
Z20
C1
C2
C3
R3
Z19
Z10
Z22
V
SUPPLY
+
C10
C11
C12
C21
RF
INPUT Z1
C16
Z11 Z12 Z13
DUT
Z14 Z15
C14
C15
Z16
Z17
Z2
Z3
Z4
Z5
C6
Z6
Z7
Z8
Z9
RF
Z18 OUTPUT
C4
C5
Z21
Z23
C13
C17
+
C9
C8
C7
C18
C19
C20
C22
Z1
Z2
Z3
Z4
Z5
Z6
Z7
Z8
Z9
Z10
Z11
Z12
0.126″ x 0.066″ Microstrip
0.584″ x 0.079″ Microstrip
0.110″ x 0.079″ Microstrip
0.133″ x 0.079″ Microstrip
0.059″ x 0.118″ Microstrip
0.059″ x 0.118″ Microstrip
0.197″ x 0.102″ Microstrip
0.860″ x 0.551″ Microstrip
0.114″ x 0.551″ Microstrip
0.129″ x 1.102″ Microstrip
0.304″ x 1.102″ Microstrip
0.295″ x 0.276″ Microstrip
Z13
Z14
Z15
Z16
Z17
Z18
Z19
Z20
Z21
Z22, Z23
PCB
0.078″ x 0.102″ Microstrip
0.319″ x 0.102″ Microstrip
0.709″ x 0.220″ Microstrip
0.709″ x 0.220″ Microstrip
0.747″ x 0.066″ Microstrip
0.227″ x 0.066″ Microstrip
0.145″ x 0.090″ Microstrip
0.548″ x 0.090″ Microstrip
0.734″ x 0.090″ Microstrip
1.044″ x 0.100″ Microstrip
Taconic RF35, 0.030″,
ε
r
= 3.5
Figure 1. MRF7S19210HR3(HSR3) Test Circuit Schematic
Table 5. MRF7S19210HR3(HSR3) Test Circuit Component Designations and Values
Part
C1, C9, C11, C12, C19, C20
C2, C8
C3, C6, C7, C10, C14, C15,
C18
C4
C5
C13
C16, C17
C21, C22
R1, R2
R3
Description
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μF,
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470
μF
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TDK
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ATC
ATC
ATC
ATC
Vishay BC Components
Welwyn
Welwyn
Manufacturer
MRF7S19210HR3 MRF7S19210HSR3
4
RF Device Data
Freescale Semiconductor
C1
R1
R2
C2
C10
C11 C12
C3
C21
CUT OUT AREA
R3
C6
C4 C5
C13
C14
C15
C16
C17
C8
C9
C7
C18
C19 C20
C22
MRF7S19210H
Rev 0
Figure 2. MRF7S19210HR3(HSR3) Test Circuit Component Layout
MRF7S19210HR3 MRF7S19210HSR3
RF Device Data
Freescale Semiconductor
5
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