19-5530; Rev 5; 4/12
TION KIT
EVALUA BLE
AVAILA
500ksps, Low-Power,
Serial 12-/10-/8-Bit ADCs
Features
S
500ksps Conversion Rate, No Pipeline Delay
S
12-/10-/8-Bit Resolution
S
1-/2-Channel, Single-Ended Analog Inputs
S
Low-Noise 73dB SNR
S
Variable I/O: 1.5V to 3.6V (Dual-Channel Only)
Allows the Serial Interface to Connect Directly
to 1.5V, 1.8V, 2.5V, or 3V Digital Systems
S
2.2V to 3.6V Supply Voltage
S
Low Power
3.3mW
Very Low Power Consumption at 8µA/ksps
S
External Reference Input (Dual-Channel Devices Only)
S
1.3µA Power-Down Current
S
SPI-/QSPI-/MICROWIRE-Compatible Serial
Interface
S
10-Pin, 3mm x 5mm µMAX Package
S
6-Pin, 2.8mm x 2.9mm SOT23 Package
S
Wide -40NC to +125NC Operation
General Description
The MAX11661−MAX11666 are 12-/10-/8-bit, compact,
low-power, successive approximation analog-to-digital
converters (ADCs). These high-performance ADCs include
a high-dynamic range sample-and-hold and a high-speed
serial interface. These ADCs accept a full-scale input from
0V to the power supply or to the reference voltage.
The MAX11662/MAX11664/MAX11666 feature dual, sin-
gle-ended analog inputs connected to the ADC core
using a 2:1 MUX. The devices also include a separate
supply input for data interface and a dedicated input
for reference voltage. In contrast, the single-channel
devices generate the reference voltage internally from
the power supply.
These
ADCs
operate from a 2.2V to 3.6V supply and
consume only 3.3mW.
The devices include full power-
down mode and fast wake-up for optimal power man-
agement and a high-speed 3-wire serial interface. The
3-wire serial interface directly connects to SPI, QSPIK,
and MICROWIRE
®
devices without external logic.
Excellent dynamic performance, low voltage, low power,
ease of use, and small package size make these con-
verters ideal for portable battery-powered data-acquisi-
tion applications, and for other applications that demand
low-power consumption and minimal space.
These ADCs are available in a 10-pin
FMAX
®
package,
and a 6-pin SOT23 package. These devices operate
over the -40NC to +125NC temperature range.
MAX11661–MAX11666
Applications
Data Acquisition
Portable Data Logging
Medical Instrumentation
Battery-Operated Systems
Communication Systems
Automotive Systems
Ordering Information
PART
MAX11661AUT+
MAX11662AUB+
MAX11663AUT+
MAX11664AUB+
MAX11665AUT+
MAX11666AUB+
MAX11666AUB/V+
PIN-PACKAGE
6 SOT23
10
FMAX-EP*
6 SOT23
10
FMAX-EP*
6 SOT23
10
FMAX-EP*
10
FMAX-EP*
BITS
8
8
10
10
12
12
12
NO. OF CHANNELS
1
2
1
2
1
2
2
Note:
All devices are specified over the -40°C to +125°C operating temperature range.
+Denotes
a lead(Pb)-free/RoHS-compliant package.
*EP
= Exposed pad.
/V denotes an automotive qualified part.
QSPI is a trademark of Motorola, Inc.
MICROWIRE is a registered trademark of National Semiconductor Corp.
µMAX is a registered trademark of Maxim Integrated Products, Inc.
_______________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
500ksps, Low-Power,
Serial 12-/10-/8-Bit ADCs
MAX11661–MAX11666
ABSOLUTE MAXIMUM RATINGS
V
DD
to GND.............................................................-0.3V to +4V
REF, OVDD, AIN1, AIN2, AIN to GND ........-0.3V to the lower of
(V
DD
+ 0.3V) and +4V
CS,
SCLK, CHSEL, DOUT TO GND ............-0.3V to the lower of
(V
OVDD
+ 0.3V) and +4V
AGND to GND ......................................................-0.3V to +0.3V
Input/Output Current (all pins) ...........................................50mA
Continuous Power Dissipation (T
A
= +70NC)
6-Pin SOT23 (derate 8.7mW/NC above +70NC) ...........696mW
10-Pin
FMAX
(derate 8.8mW/NC above +70NC)........707.3mW
Operating Temperature Range ....................... .-40NC to +125NC
Junction Temperature .....................................................+150NC
Storage Temperature Range............................ -65NC to +150NC
Lead Temperature (soldering, 10s) ................................+300NC
Soldering Temperature (reflow) ......................................+260NC
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS (MAX11666)
(V
DD
= 2.2V to 3.6V, V
REF
= V
DD
, V
OVDD
= V
DD
. f
SCLK
= 8MHz, 50% duty cycle, 500ksps. C
DOUT
= 10pF, T
A
= -40NC to +125NC,
unless otherwise noted. Typical values are at T
A
= +25NC.) (Note 1)
PARAMETER
DC ACCURACY
Resolution
Integral Nonlinearity
Differential Nonlinearity
Offset Error
Gain Error
Total Unadjusted Error
Channel-to-Channel Offset
Matching
Channel-to-Channel Gain
Matching
DYNAMIC PERFORMANCE (f
AIN
= 250kHz)
Signal-to-Noise and Distortion
Signal-to-Noise Ratio
Total Harmonic Distortion
Spurious-Free Dynamic Range
Intermodulation Distortion
Full-Power Bandwidth
Full-Linear Bandwidth
Small-Signal Bandwidth
Crosstalk
SINAD
SNR
THD
SFDR
IMD
f
1
= 239.8kHz, f
2
= 200.2kHz
-3dB point
SINAD > 68dB
75.5
70
70.5
72
72.5
-85
85
-84
40
2.5
45
-90
-74.5
dB
dB
dB
dB
dB
MHz
MHz
MHz
dB
INL
DNL
OE
GE
TUE
Excluding offset and reference errors
No missing codes
Q0.3
Q1
Q1
Q0.4
Q0.05
12
Q1
Q1
Q4
Q3
Bits
LSB
LSB
LSB
LSB
LSB
LSB
LSB
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
2
______________________________________________________________________________________
500ksps, Low-Power,
Serial 12-/10-/8-Bit ADCs
ELECTRICAL CHARACTERISTICS (MAX11666) (continued)
(V
DD
= 2.2V to 3.6V, V
REF
= V
DD
, V
OVDD
= V
DD
. f
SCLK
= 8MHz, 50% duty cycle, 500ksps. C
DOUT
= 10pF, T
A
= -40NC to +125NC,
unless otherwise noted. Typical values are at T
A
= +25NC.) (Note 1)
PARAMETER
CONVERSION RATE
Throughput
Conversion Time
Acquisition Time
Aperture Delay
Aperture Jitter
Serial-Clock Frequency
ANALOG INPUT (AIN1, AIN2)
Input Voltage Range
Input Leakage Current
Input Capacitance
V
AIN_
I
ILA
C
AIN_
Track
Hold
0
0.002
20
4
V
DD
+
0.05
0.005
5
0.75 x
V
OVDD
0.25 x
V
OVDD
0.15 x
V
OVDD
Inputs at GND or V
DD
0.001
2
0.85 x
V
OVDD
0.15 x
V
OVDD
Q1.0
4
Q1
Q1
V
REF
Q1
V
FA
pF
f
CLK
0.08
t
ACQ
From
CS
falling edge
5
1.56
52
4
15
8
500
ksps
Fs
ns
ns
ps
MHz
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
MAX11661–MAX11666
EXTERNAL REFERENCE INPUT (REF)
Reference Input Voltage Range
Reference Input Leakage
Current
Reference Input Capacitance
V
REF
I
ILR
C
REF
Conversion stopped
1
V
FA
pF
DIGITAL INPUTS (SCLK,
CS,
CHSEL)
Digital Input High Voltage
Digital Input Low Voltage
Digital Input Hysteresis
Digital Input Leakage Current
Digital Input Capacitance
DIGITAL OUTPUT (DOUT)
Output High Voltage
Output Low Voltage
High-Impedance Leakage
Current
High-Impedance Output
Capacitance
V
OH
V
OL
I
OL
C
OUT
I
SOURCE
= 200FA
I
SINK
= 200FA
V
V
FA
pF
V
IH
V
IL
V
HYST
I
IL
C
IN
V
V
V
FA
pF
_______________________________________________________________________________________
3
500ksps, Low-Power,
Serial 12-/10-/8-Bit ADCs
MAX11661–MAX11666
ELECTRICAL CHARACTERISTICS (MAX11666) (continued)
(V
DD
= 2.2V to 3.6V, V
REF
= V
DD
, V
OVDD
= V
DD
. f
SCLK
= 8MHz, 50% duty cycle, 500ksps. C
DOUT
= 10pF, T
A
= -40NC to +125NC,
unless otherwise noted. Typical values are at T
A
= +25NC.) (Note 1)
PARAMETER
POWER SUPPLY
Positive Supply Voltage
Digital I/O Supply Voltage
Positive Supply Current
(Full-Power Mode)
Positive Supply Current (Full-
Power Mode), No Clock
Power-Down Current
Line Rejection
TIMING CHARACTERISTICS (Note 2)
Quiet Time
CS
Pulse Width
CS
Fall to SCLK Setup
CS
Falling Until DOUT High-
Impedance Disabled
Data Access Time After SCLK
Falling Edge
SCLK Pulse Width Low
SCLK Pulse Width High
Data Hold Time From SCLK
Falling Edge
SCLK Falling Until DOUT High
Impedance
Power-Up Time
t
Q
t
1
t
2
t
3
t
4
t
5
t
6
t
7
t
8
(Note 3)
(Note 3)
(Note 3)
(Note 3)
Figure 2, V
OVDD
= 2.2V to 3.6V
Figure 2, V
OVDD
= 1.5V to 2.2V
Percentage of clock period (Note 3)
Percentage of clock period (Note 3)
Figure 3
Figure 4 (Note 3)
Conversion cycle (Note 3)
40
40
5
2.5
14
1
4
10
5
1
15
16.5
60
60
ns
ns
ns
ns
ns
%
%
ns
ns
Cycle
V
DD
V
OVDD
I
VDD
I
OVDD
I
VDD
I
PD
Leakage only
V
DD
= 2.2V to 3.6V, V
REF
= 2.2V
V
AIN_
= V
GND
V
AIN_
= V
GND
1.5
1.3
0.7
10
2.2
1.5
3.6
V
DD
1.67
0.1
V
V
mA
mA
FA
LSB/V
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
ELECTRICAL CHARACTERISTICS (MAX11665)
(V
DD
= 2.2V to 3.6V, f
SCLK
= 8MHz, 50% duty cycle, 500ksps, C
DOUT
= 10pF, T
A
= -40NC to +125NC, unless otherwise noted. Typical
values are at T
A
= +25NC.) (Note 1)
PARAMETER
DC ACCURACY
Resolution
Integral Nonlinearity
Differential Nonlinearity
Offset Error
Gain Error
Total Unadjusted Error
Signal-to-Noise and Distortion
Signal-to-Noise Ratio
INL
DNL
OE
GE
TUE
SINAD
SNR
70
70.5
Excluding offset and reference errors
No missing codes
Q1.5
Q1
Q1.5
72.5
73
12
Q1
Q1
Q4
Q3
Bits
LSB
LSB
LSB
LSB
LSB
dB
dB
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DYNAMIC PERFORMANCE (f
AIN
= 250kHz)
4
______________________________________________________________________________________
500ksps, Low-Power,
Serial 12-/10-/8-Bit ADCs
ELECTRICAL CHARACTERISTICS (MAX11665) (continued)
(V
DD
= 2.2V to 3.6V, f
SCLK
= 8MHz, 50% duty cycle, 500ksps, C
DOUT
= 10pF, T
A
= -40NC to +125NC, unless otherwise noted. Typical
values are at T
A
= +25NC.) (Note 1)
PARAMETER
Total Harmonic Distortion
Spurious-Free Dynamic Range
Intermodulation Distortion
Full-Power Bandwidth
Full-Linear Bandwidth
Small-Signal Bandwidth
CONVERSION RATE
Throughput
Conversion Time
Acquisition Time
Aperture Delay
Aperture Jitter
Serial Clock Frequency
ANALOG INPUT
Input Voltage Range
Input Leakage Current
Input Capacitance
V
AIN
I
ILA
C
AIN
Track
Hold
0.75 x
V
VDD
0.25 x
V
VDD
0.15 x
V
VDD
Inputs at GND or V
DD
0.001
2
0.85 x
V
VDD
0.15 x
V
VDD
Q1.0
4
Q1
0
0.002
20
4
V
DD
Q1
V
FA
pF
f
CLK
0.08
t
ACQ
From
CS
falling edge
5
1.56
52
4
15
8
500
ksps
Fs
ns
ns
ps
MHz
SYMBOL
THD
SFDR
IMD
f
1
= 239.8kHz, f
2
= 200.2kHz
-3dB point
SINAD > 68dB
77
CONDITIONS
MIN
TYP
-85
85
-84
40
2.5
45
MAX
-76
UNITS
dB
dB
dB
MHz
MHz
MHz
MAX11661–MAX11666
DIGITAL INPUTS (SCLK,
CS,
CHSEL)
Digital Input High Voltage
Digital Input Low Voltage
Digital Input Hysteresis
Digital Input Leakage Current
Digital Input Capacitance
DIGITAL OUTPUT (DOUT)
Output High Voltage
Output Low Voltage
High-Impedance Leakage
Current
High-Impedance Output
Capacitance
POWER SUPPLY
Positive Supply Voltage
Positive Supply Current
(Full-Power Mode)
V
DD
I
VDD
V
AIN
= V
GND
2.2
3.6
1.76
V
mA
V
OH
V
OL
I
OL
C
OUT
I
SOURCE
= 200FA
I
SINK
= 200FA
V
V
FA
pF
V
IH
V
IL
V
HYST
I
IL
C
IN
V
V
V
FA
pF
_______________________________________________________________________________________
5
嵌入式系统
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
