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74LCX245

产品描述LVC/LCX/Z SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO20
产品类别半导体    逻辑   
文件大小242KB,共10页
制造商ST(意法半导体)
官网地址http://www.st.com/
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74LCX245概述

LVC/LCX/Z SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO20

74LCX245规格参数

参数名称属性值
功能数量1
端子数量20
最大工作温度125 Cel
最小工作温度-55 Cel
最大供电/工作电压3.6 V
最小供电/工作电压2 V
额定供电电压2.7 V
端口数2
加工封装描述SOP-20
无铅Yes
欧盟RoHS规范Yes
状态ACTIVE
工艺CMOS
包装形状RECTANGULAR
包装尺寸SMALL OUTLINE
表面贴装Yes
端子形式GULL WING
端子间距1.27 mm
端子涂层NICKEL PALLADIUM GOLD
端子位置DUAL
包装材料PLASTIC/EPOXY
温度等级MILITARY
系列LVC/LCX/Z
输出特性3-ST
逻辑IC类型TRANSCEIVER
位数8
输出极性TRUE
传播延迟TPD9.2 ns

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74LCX245
LOW VOLTAGE CMOS OCTAL BUS TRANSCEIVER(3-STATE)
WITH 5V TOLERAT INPUTS AND OUTPUTS
s
s
s
s
s
s
s
s
s
s
5V TOLERANT INPUTS AND OUTPUTS
HIGH SPEED :
t
PD
= 7.0 ns (MAX.) at V
CC
= 3V
POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 24mA (MIN) at V
CC
= 3V
PCI BUS LEVELS GUARANTEED AT 24 mA
BALANCED PROPAGATION DELAYS:
t
PLH
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2.0V to 3.6V (1.5V Data
Retention)
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 245
LATCH-UP PERFORMANCE EXCEEDS
500mA (JESD 17)
ESD PERFORMANCE:
HBM > 2000V (MIL STD 883 method 3015);
MM > 200V
SOP
TSSOP
ORDER CODES
PACKAGE
SOP
TSSOP
TUBE
74LCX245M
T&R
74LCX245MTR
74LCX245TTR
DESCRIPTION
The 74LCX245 is a low voltage CMOS OCTAL
BUS TRANSCEIVER (3-STATE) fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology. It is ideal for low power
and high speed 3.3V applications; it can be
interfaced to 5V signal environment for both inputs
and outputs.
PIN CONNECTION AND IEC LOGIC SYMBOLS
It has same speed performance at 3.3V than 5V
AC/ACT family, combined with a lower power
consumption.
This IC is intended for two way asynchronous
communication between data buses; the direction
of data transmission is determined by DIR input.
The enable input G can be used to disable the
device so that the buses are effectively isolated.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
All floating bus terminals during High Z state must
be held HIGH or LOW.
September 2001
1/10

 
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