HCMS-235x
CMOS Extended Temperature Range
5 x 7 Alphanumeric Display
Data Sheet
Description
This sunlight viewable 5 x 7 LED four-character display
is contained in 12 pin dual-in-line packages designed
for displaying alphanumeric information. The display is
designed with on-board CMOS integrated circuits. Two
CMOS ICs form an on-board 28-bit serial-in/parallel-out
shift register with constant current output LED row driv-
ers. Decoded column data is clocked into the on-board
shift register for each refresh cycle. Full character display
is achieved with external column strobing.
Features
•
On-Board low power CMOS IC
Integrated
shift register with constant current LED
drivers
•
Wide operating temperature range
-55°C to +100°C
•
Compact glass ceramic 4 character package
Series X-Y stackable
•
Sunlight viewable
•
5 x 7 LED matrix displays full ASCII set
•
Character height of 5.0 mm (0.20 inch)
•
Wide viewing angle
X Axis = ±50°
Y Axis = ±65°
•
Usable in night vision lighting applications
Typical Applications
•
•
•
•
Avionics
Communication systems
Fire control systems
Radar systems
Package Dimensions
20.01
(0.790) MAX.
2.84
(0.112)REF.
12 11 10
4.87
(0.192) REF.
9
8
SEE
NOTE 3
7
SEE NOTE 3
1
2
1
PIN 1 MARKED BY DOT
ON BACK OF PACKAGE
2
3
C
L
4
3
5
6
5.00 ± 0.13
(0.197 ± 0.005)
4
8.43
(0.332)
2.79 ± 0.13
(0.110 ± 0.006)
LUMINOUS INTENSITY
CATEGORY
X
COLOR BIN
1.27
(0.050)
1.78
(0.070)
PART NUMBER
Z
DATE CODE
HCMS-23XX
XXYY
2.41
(0.095)
PIN 1
3.56
(0.140)
1.27 ± 0.13
(0.050 ± 0.005)
5.08
(0.200)
2.54
(0.100)
6.85
(0.270)
0.25 ± 0.08 TYP.
(0.010 ± 0.003)
6.35 ± 0.25
(0.250 ± 0.010)
PIN
1
2
3
4
5
6
FUNCTION
PIN FUNCTION
DATA OUT
VB
V
DD
CLOCK
GROUND
DATA IN
COLUMN 1
7
COLUMN 2
8
COLUMN 3
9
COLUMN 4
10
COLUMN 5
11
INT. CONNECT* 12
1.27 TYP.
(0.050)
2.54 ± 0.13
(0.100 ± 0.005) TYP.
NON ACCUM.
0.54 ± 0.08
(0.020 ± 0.003)
* DO NOT CONNECT OR USE
NOTES:
1. DIMENSIONS IN MILLIMETERS (INCHES).
2. UNLESS OTHERWISE SPECIFIED, THE
TOLERANCE ON ALL DIMENSIONS IS
± 0.38 mm (± 0.015).
3. CHARACTERS ARE CENTERED WITH RESPECT
TO LEADS WITHIN ± 0.13 mm (± 0.005).
4. LEAD MATERIAL IS COPPER ALLOY,
SOLDER DIPPED.
Absolute Maximum Ratings
Parameter
Supply Voltage V
DD
to Ground
Data Input, Data Output, V
B
Column Input Voltage, V
COL
Free Air Operating Temperature Range, T
A
Storage Temperature Range, T
s
Maximum Allowable Package Power Dissipation, P
D[2,3]
at T
A
= 71°C
Through-the-Wave Solder Temperature
[4]
Solder Dipping Temperature
[4]
ESD Protection @ 1.5 kΩ, 100 pF
Value
–0.3 V to 7.0 V
[1]
–0.3 V to V
DD
–0.3 V to V
DD
–55°C to +100°C
–55°C to +100°C
1.31 Watts
250°C for 3 secs. max.
260°C for 5 secs. max.
V
Z
= 4 kV
Notes:
1. Maximum duration 2 seconds.
2. Maximum allowable power dissipation is derived from V
DD
= 5.25 V, V
B
= 2.4 V, V
COL
= 3.5 V, 20 LEDs ON per character, 20% DF.
3. HCMS-2353 derate above 71°C at 23 mW/°C, Rq
J-A
= 45°C/W.
Derating based on Rq
PC-A
= 35°C/W per display for printed circuit board assembly.
4. 1.59 mm (0.063”) Below Body
2
Recommended Operating Conditions
Over Operating Range (–55°C to + 100°C)
Parameter
Supply Voltage
Data Out Current, Low State
Data Out Current, High State
Column Input Voltage
Setup Time
Hold Time
Clock Pulse Width High
Clock Pulse Width Low
Clock High to Low Transition
Clock Frequency
Symbol
V
DD
I
OL
I
OH
V
COL
t
SETUP
t
HOLD
t
WH(CLOCK)
t
WL(CLOCK)
t
THL
f
CLOCK
Min.
4.75
Typ.
5.00
Max
5.25
1.6
–0.5
Units
V
mA
mA
V
ns
ns
ns
ns
2.75
10
25
50
50
3.0
3.5
200
5
ns
MHz
Electrical Characteristics
Over Operating Range (–55°C to + 100°C)
Parameter
Supply Current, Dynamic
[1]
Supply Current, Static
[2]
Column Input Current
Input Logic High Data, V
B
, Clock
Input Logic Low Data, V
B
, Clock
Input Current
Data
Clock, V
B
Data Out Voltage
Symbol
I
DDD
I
DDDSoff
I
DDDSon
I
COL
V
IH
V
IL
I
I
Test Conditions
f
CLOCK
= 5 MHz
V
B
= 0.4 V, Data and Clock = 0.4 V
V
B
= 2.4 V, Data and Clock = 0.4 V
V
B
= 0.4 V
V
B
= 2.4 V
V
DD
= 4.75 V
V
DD
= 5.25 V
V
DD
= 5.25 V
V
I[3]
= 2.4 V (Logic High) or
V
I[3]
= 0.4 V (Logic Low)
V
DD
= 4.75 V
I
OH
= –0.5 mA
I
COL
= 0 mA
V
DD
= 5.25 V
I
OL
= 1.6 mA
I
COL
= 0 mA
V
DD
= 5.0 V
V
COL
= 3.5 V
17.5% DF
V
B
= 2.4 V
15 LEDs ON per Character
Min
Typ.*
6.2
1.8
2.2
500
Max Units
7.8
26
6.0
10
650
0.8
mA
mA
µA
mA
V
V
µA
V
2.0
V
OH
–46
–92
2.4
–60
–120
4.2
–103
–206
V
OL
0.2
0.4
V
Power Dissipation Per Package
[4]
P
D
668
mW
Thermal Resistance
IC Junction-to-Pin
[5]
Leak Rate
Rq
J-PIN
10
5x10
-8
°C/W
cc/sec
*All typical values specified at V
DD
= 5.0 V and T
A
= 25°C.
Notes:
1. I
DD
Dynamic is the IC current while clocking column data through the on-board shift register at a clock frequency of 5 MHz, the display is not
illuminated.
2. I
DD
Static is the IC current after column data is loaded and not being clocked through the on-board shift register.
3. V
I
represents the input voltage to an input pin.
4. Four characters are illuminated with a typical ASCII character composed of 15 dots per character.
5. IC junction temperature T
J
(IC) = (P
D
)(Rq
J-PIN
+ Rq
PC-A
) + T
A
.
3
Optical Characteristics at T
A
= 25°C
High Performance Green HCMS-2353
Description
Peak Luminous Intensity per LED
[6]
(Character Average)
Symbol
I
vPEAK
Test Condition
V
DD
= 5.0 V
V
COL
= 3.5 V
V
B
= 2.4 V
T
i
= 25°C
[7]
Min.
2400
Typ.*
3000
Max.
Units
µcd
Dominant Wavelength
[8,9]
Peak Wavelength
l
d
l
PEAK
574
568
nm
nm
Yellow HCMS-2351
Description
Peak Luminous Intensity per
LED
[6]
(Character Average)
Symbol
I
vPEAK
Test Condition
V
DD
= 5.0V
V
COL
= 3.5 V
V
B
= 2.4V
Ti = 25°C
[7]
Min
1600
Typ.*
2400
Max.
Units
mcd
Dominant Wavelength
[8,9]
Peak Wavelength
l
d
l
PEAK
585
583
nm
nm
*All typical values specified at V
DD
= 5.0 V and T
A
= 25°C unless otherwise noted.
Notes:
6. These LED displays are categorized for luminous intensity, with the intensity category designated by a letter code on the back of the package.
7. T
i
refers to the initial case temperature of the display immediately prior to the light measurement.
8. Dominant wavelength,
l
d
, is derived from the CIE Chromaticity Diagram, and represents the single wavelength which defines the color of the
device.
9. Categorized for color with the color category designated by a number on the back of the package.
Switching Characteristics
1/f
CLOCK
t
THL
t
WH
V
IH
CLOCK
2.0 V
Parameter
f
clock
CLOCK Rate
t
PLH
, t
PHL
Propagation Delay
CLOCK to DATA OUT
t
OFF
Condition
C
L
= 15 pF
R
L
= 2.4 kΩ
Typ. Max.
5
105
Units
MHz
ns
t
WL
V
IL 0.8 V
t
SETUP
V
IH
t
HOLD
V
B
(0.4 V) to
Display OFF
t
ON
4
5
µs
DATA IN
2.0 V
V
IL 0.8 V
t
PLH
, t
PHL
DATA OUT
2.4 V
0.4 V
V
B
(2.4 V) to
V
OH
V
OL
1
2
Display ON
V
IH
V
B
V
IL
ON (ILLUMINATED)
DISPLAY
OFF (NOT ILLUMINATED)
2.0 V
0.8 V
t
OFF
90%
10%
t
ON
4
Electrical Description
The display contains four 5 x 7 LED dot matrix characters
and two CMOS integrated circuits, as shown in Figure 1.
The two CMOS integrated circuits form an on-board 28 bit
serial-in/parallel-out shift register that will accept standard
TTL logic levels. The Data Input, pin 12, is connected to bit
position 1 and the Data Output, pin 7, is connected to bit
position 28. The shift register outputs control constant
current sinking LED row drivers. A logic 1 stored in the
shift register enables the corresponding LED row driver
and a logic 0 stored in the shift register disables the corre-
sponding LED row driver.
The electrical configuration of these CMOS IC alphanumeric
displays allows for an effective interface to a display control-
ler circuit that supplies decoded character information. The
row data for a given column (one 7 bit byte per character)
is loaded (bit serial) into the on-board 28 bit shift register
with high to low transitions of the Clock input. To load
decoded character information into the display, column
data for character 4 is loaded first and the column data
for character 1 is loaded last in the following manner. The
7 data bits for column 1, character 4, are loaded into the
on-board shift register. Next, the 7 data bits for column 1,
character 3, are loaded into the shift register, shifting the
character 4 data over one character position. This process
is repeated for the other two characters until all 28 bits of
column data (four 7 bit bytes of character column data) are
loaded into the on-board shift register. Then the column
1 input, V
COL
pin 1, is energized to illuminate column 1 in
all four characters. This process is repeated for columns 2,
3, 4 and 5. All V
COL
inputs should be at logic low to insure
the display is off when loading data. The display will be
blanked when the blanking input V
B
, pin 8, is at logic low
regardless of the outputs of the shift register or whether
one of the V
COL
inputs is energized. Refer to Application
Note 1016 for drive circuit information.
COLUMN DRIVE INPUTS
COLUMN
1 2 3 4 5
LED
MATRIX
2
LED
MATRIX
3
LED
MATRIX
4
BLANKING
CONTROL, V
B
1 2 3 4 5 6 7
ROWS
ROWS 1-7
ROWS 1-7
ROWS 1-7
CONSTANT CURRENT SINKING LED DRIVERS
SERIAL
DATA
INPUT
1 2 3 4 5 6 7
ROWS 8-14
ROWS 15-21
ROWS 22-28
28-BIT SIPO SHIFT REGISTER
SERIAL
DATA
OUTPUT
CLOCK
Figure 1. Display block diagram.
5
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