100LVEL16 3.3V ECL Differential Receiver
January 2003
Revised February 2003
100LVEL16
3.3V ECL Differential Receiver
General Description
The 100LVEL16 is a low voltage differential receiver that
contains an internally supplied voltage source, V
BB
. When
used in a single ended input condition the unused input
must be tied to V
BB
. When operating in this mode use a
0.01
µ
F capacitor to decouple V
BB
and V
CC
and also limit
the current sinking or sourcing capability to 0.5mA. When
V
BB
is not used it should be left open.
With inputs open the differential Q outputs default LOW
and Q outputs default HIGH.
The 100 series is temperature compensated.
Features
s
Typical propagation delay of 300 ps
s
Typical I
EE
of 17 mA
s
Internal pull-down resistors on D
s
Fairchild MSOP-8 package is a drop-in replacement to
ON TSSOP-8
s
Meets or exceeds JEDEC specification EIA/JESD78 IC
latch-up test
s
Moisture Sensitivity Level 1
s
ESD Performance:
Human Body Model
>
2000V
Machine Model
>
150V
Ordering Code:
Product
Order Number
100LVEL16M
100LVEL16M8
(Preliminary)
Package
M08A
MA08D
Code
KVL16
KV16
Package Description
8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
8-Lead Molded Small Outline Package (MSOP), JEDEC MO-187, 3.0mm Wide
Number Top Mark
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Connection Diagram
Logic Diagram
Top View
Pin Descriptions
Pin Name
Q, Q
D, D
V
BB
V
CC
V
EE
NC
Description
ECL Data Outputs
ECL Data Inputs
Reference Voltage
Positive Supply
Negative Supply
No Connect
© 2003 Fairchild Semiconductor Corporation
DS500776
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100LVEL16
Absolute Maximum Ratings
(Note 1)
PECL Supply Voltage (V
CC
) V
EE
=
0V
NECL Supply Voltage (V
EE
) V
CC
=
0V
PECL DC Input Voltage (V
I
) V
EE
=
0V
NECL DC Input Voltage (V
I
) V
CC
=
0V
DC Output Current (I
OUT
)
Continuous
Surge
V
BB
Sink/Source Current (I
BB
)
Storage Temperature (T
STG
)
50 mA
100 mA
0.0V to
+
8.0V
0.0V to
−
8.0V
0.0V to
+
6.0V
0.0V to
−
6.0V
Recommended Operating
Conditions
PECL Power Supply
(V
EE
=
0V)
NECL Power Supply
(V
CC
=
0V)
Free Air Operating Temperature (T
A
)
V
EE
= −
3.8V to
−
3.0V
V
CC
=
3.0V to 3.8V
−
40
°
C to
+
85
°
C
±
0.5 mA
−
65
°
C to
+
150
°
C
Note 1:
The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
LVPECL DC Electrical Characteristics
V
CC
=
3.3V; V
EE
=
0.0V (Note 2)
Symbol
I
EE
V
OH
V
OL
V
IH
V
IL
V
BB
V
IHCMR
Parameter
Power Supply Current
Output HIGH Voltage (Note 3)
Output LOW Voltage (Note 3)
Input HIGH Voltage (Single Ended)
Input LOW Voltage (Single Ended)
Output Voltage Reference
Input HIGH Voltage Common Mode
Range (Differential) (Note 4)
V
PP
<
500mV
V
PP
≥
500mV
I
IH
I
IL
Input HIGH Current (Note 5)
Input LOW Current (Note 5)
D
D
0.5
−600
1.2
1.5
2.9
2.9
150
0.5
−600
1.1
1.4
2.9
2.9
150
0.5
−600
1.1
1.4
2.9
2.9
150
V
µA
µA
2215
1470
2135
1490
1.92
−40°C
Min
Typ
17
2295
1605
Max
23
2420
1745
2420
1825
2.04
2275
1490
2135
1490
1.92
Min
25°C
Typ
17
2345
1595
Max
23
2420
1680
2420
1825
2.04
2275
1490
2135
1490
1.92
Min
85°C
Typ
18
2345
1595
Max
24
2420
1680
2420
1825
2.04
Units
mA
mV
mV
mV
mV
V
Note 2:
Input and output parameters vary 1 to 1 with V
CC
. V
EE
can vary
±0.3V.
Note 3:
Outputs are terminated through a 50Ω Resistor to V
CC
−
2.0V.
Note 4:
V
IHCMR
minimum varies 1 to 1 with V
EE
. V
IHCMR
maximum varies 1 to 1 with V
CC
. The V
IHCMR
range is referenced to the most positive side of the dif-
ferential input signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between V
PPMIN
and
1V.
Note 5:
Absolute value of the input HIGH and LOW current should not exceed the absolute value of the stated Min or Max specification.
Note:
Devices are designed to meet the DC specifications after thermal equilibrium has been established. Circuit is tested with air flow greater than
500LFPM maintained.
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2
100LVEL16
LVNECL DC Electrical Characteristics
V
CC
=
0.0V; V
EE
= −
3.3V (Note 6)
Symbol
I
EE
V
OH
V
OL
V
IH
V
IL
V
BB
V
IHCMR
Parameter
Power Supply Current
Output HIGH Voltage (Note 7)
Output LOW Voltage (Note 7)
Input HIGH Voltage (Single Ended)
Input LOW Voltage (Single Ended)
Output Voltage Reference
Input HIGH Voltage Common Mode
Range (Differential) (Note 8)
V
PP
<
500mV
V
PP
≥
500mV
I
IH
I
IL
Input HIGH Current
Input LOW Current
D
D
0.5
−600
−2.5
−1.8
−0.4
−0.4
150
0.5
−600
−2.5
−1.9
−0.4
−0.4
150
0.5
−600
−2.5
−1.9
−0.4
−0.4
150
V
µA
µA
−1085
−1830
−1165
−1810
−1.38
−40°C
Min
Typ
17
−1005
−1695
Max
23
−880
−1555
−880
−1475
−1.26
−1025
−1810
−1165
−1810
−1.38
Min
25°C
Typ
17
−955
−1705
Max
23
−880
−1620
−880
−1475
−1.26
−1025
−1810
−1165
−1810
−1.38
Min
85°C
Typ
18
−955
−1705
Max
24
−880
−1620
−880
-1475
−1.26
Units
mA
mV
mV
mV
mV
V
Note 6:
Input and output parameters vary 1 to 1 with V
CC
. V
EE
can vary
±0.3V.
Note 7:
Outputs are terminated through a 50Ω Resistor to V
CC
−
2.0V.
Note 8:
V
IHCMR
minimum varies 1 to 1 with V
EE
. V
IHCMR
maximum varies 1-to-1 with V
CC
. The V
IHCMR
range is referenced to the most positive side of the
differential input signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between V
PPMIN
and
1V.
Note 9:
Absolute value of the input HIGH and LOW current should not exceed the absolute value of the stated Min or Max specification.
Note:
Devices are designed to meet the DC specifications after thermal equilibrium has been established. Circuit is tested with air flow greater than
500LFPM maintained.
100LVEL16 AC Electrical Characteristics
V
CC
=
3.3V; V
EE
=
0.0V or V
CC
=
0.0V; V
EE
= −
3.3V
(Note 10) (Note 11)
Symbol
f
MAX
t
PLH
, t
PHL
t
SKEW
t
JITTER
V
PP
t
r
, t
f
Parameter
Maximum Toggle Frequency
Propagation Delay to Output (Diff)
(SE)
Duty Cycle Skew (Note 12)
Cycle-to-Cycle Jitter
Input Swing
Output Rise Times Q (20% to 80%)
150
120
220
150
100
−40°C
Min
Typ
TBD
275
275
5
TBD
1000
320
150
120
220
400
450
30
225
175
Max
Min
25°C
Typ
TBD
300
300
5
TBD
1000
320
150
120
220
375
425
20
240
190
Max
Min
85°C
Typ
TBD
315
315
5
TBD
1000
320
390
440
20
Max
Units
GHz
ps
ps
ps
mV
ps
Figure 1
Figure 2
Figures
1, 3
Figure
Number
Note 10:
V
EE
can vary
±
0.3V.
Note 11:
Measured using a 750 mV input swing centered at V
CC
- 1.32V; 50% duty cycle clock source; t
r
=
t
f
=
250 ps (20% - 80%) at f
IN
=
1 MHz. All loading
with 50Ω to V
CC
−
2.0V.
Note 12:
Duty cycle skew is the difference between a t
PLH
and t
PHL
propagation delay through a device under identical conditions.
3
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100LVEL16
Switching Waveforms
FIGURE 1. Differential to Differential Propagation Delay
FIGURE 2. Differential Output Edge Rates
FIGURE 3. Single Ended to Differential Propagation Delay
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4
100LVEL16
Physical Dimensions
inches (millimeters) unless otherwise noted
8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Package Number M08A
5
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