INTEGRATED CIRCUITS
74F3038
Quad 2-input NAND 30
Ω
line driver
(open collector)
Product specification
Supersedes data of 1990 Jan 29
IC15 Data Handbook
1998 May 21
Philips
Semiconductors
Philips Semiconductors
Product specification
Quad 2-input NAND 30Ω line driver (open collector)
74F3038
FEATURES
•
30Ω line driver
•
160mA output drive capability
•
High speed
•
Facilitates incident wave switching
•
3nh lead inductance each on V
CC
and GND when both side pins
are used
PIN CONFIGURATION
D0a
D0b
Q0
GND
GND
Q1
D1a
1
2
3
4
5
6
7
8
16
15
14
13
12
11
Q3
D3b
D3a
V
CC
V
CC
D2a
10 D2b
9
Q2
DESCRIPTION
The 74F3038 is a high current Open-Collector Line Driver
composed of four 2-input NAND gates. It has been designed to deal
with the transmission line effects of PC boards which appear when
fast edge rates are used.
The 74F3038 can sink 160mA with a V
CC
as low as 4.5V. This
guarantees incident wave switching with V
OL
not more than 0.8V
while driving impedances as low as 30Ω. This is applicable with any
combination of outputs using continuous duty.
The AC specifications for the 74F3038 were determined using the
standard FAST load for open-collector parts of 50pF capacitance, a
500Ω pull-up resistor and a 500Ω pull-down resistor. (See Test
Circuit).
Reducing the load resistors to 100Ω will decrease the t
PLH
propagation delay by approximately 50% while increasing t
PHL
only
slightly. The graph of typical propagation delay versus load resistor
(see AC Characteristics section for Graph) shows a spline fit curve
from four measured data points, R
L
= 30Ω, R
L
= 100Ω, R
L
= 300Ω,
and R
L
= 500Ω.
D1b
SF00570
TYPE
74F3038
TYPICAL
PROPAGATION
DELAY
6.0ns
TYPICAL
SUPPLY CURRENT
(TOTAL)
17mA
ORDERING INFORMATION
DESCRIPTION
16-pin Plastic DIP
16-pin Plastic SOL
COMMERCIAL RANGE
V
CC
= 5V
±10%,
T
amb
= 0°C to +70°C
N74F3038N
N74F3038D
PACKAGE
DRAWING
NUMBER
SOT38-4
SOT162-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
Dna, Dnb
Qn
Data inputs
Data outputs
DESCRIPTION
74F(U.L.)
HIGH/LOW
1.0/1.0
OC/266
LOAD VALUE
HIGH/LOW
20µA/0.6mA
OC/160mA
NOTE:
One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state. OC = Open Collector.
LOGIC SYMBOL
1
2
7
8
10
11
14
15
IEC/IEEE SYMBOL
1
2
7
&
3
D0a D0b D1a D1a D2a D2b D3a D3b
8
10
6
Q0
Q1
Q2 Q3
11
14
15
9
16
V
CC
= Pin 12,13
GND = Pin 4, 5
3
6
9
16
SF00571
SF00572
1998 May 21
2
853-0022 19433
Philips Semiconductors
Product specification
Quad 2-input NAND 30Ω line driver (open collector)
74F3038
LOGIC DIAGRAM
1
D0a
D0b 2
7
D1a
8
D1b
D2a
D2b
10
11
3
Q0
FUNCTION TABLE
INPUTS
Dna
6
Q1
OUTPUT
Dnb
L
H
L
H
Qn
H
H
H
L
L
L
9
Q2
H
H
H = High voltage level
L = Low voltage level
V
CC
= Pin 12,13
GND = Pin 4, 5
14
D3a
15
D3b
16
Q3
SF00569
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limits set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free-air temperature range.)
SYMBOL
V
CC
V
IN
I
IN
V
OUT
I
OUT
T
amb
T
stg
Supply voltage
Input voltage
Input current
Voltage applied to output in High output state
Current applied to output in Low output state
Operating free-air temperature range
Storage temperature range
PARAMETER
RATING
–0.5 to +7.0
–0.5 to +7.0
–30 to +5
–0.5 to V
CC
320
0 to +70
–65 to +150
UNIT
V
V
mA
V
mA
°C
°C
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
V
CC
V
IH
V
IL
I
IK
V
OH
I
OL
T
amb
Supply voltage
High-level input voltage
Low-level input voltage
Input clamp current
High-level output voltage
Low-level output current
Operating free-air temperature range
0
PARAMETER
MIN
4.5
2.0
0.8
–18
4.5
160
+70
NOM
5.0
MAX
5.5
V
V
V
mA
V
mA
°C
UNIT
1998 May 21
3
Philips Semiconductors
Product specification
Quad 2-input NAND 30Ω line driver (open collector)
74F3038
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
I
OH
V
O
OL
V
IK
I
I
I
IH
I
IL
I
CC
PARAMETER
High-level output current
Low-level
Low level output current
Input clamp voltage
Input current at maximum input
voltage
High-level input current
Low-level input current
Supply current (total)
I
CCH
I
CCL
TEST CONDITIONS
1
V
CC
= MIN, V
IL
= MAX, V
IH
= MIN, V
OH
= MAX
V
CC
= MIN
V
IL
= MAX
V
IH
= MIN
I
OL
= 100mA
I
OL
= 160mA
3
V
CC
= MIN, I
I
= I
IK
V
CC
= MAX, V
I
= 7.0V
V
CC
= MAX, V
I
= 2.7V
V
CC
= MAX, V
I
= 0.5V
V
CC
= MAX
V
IN
= GND
V
IN
= 4.5V
3.5
30
±10%
V
CC
±5%
V
CC
–0.73
0.42
LIMITS
MIN
TYP
2
MAX
250
0.55
0.80
–1.2
100
20
–0.6
6.0
40
UNIT
µA
V
V
V
µA
µA
mA
mA
mA
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V
CC
= 5V, T
amb
= 25°C.
3. I
OL1
is the current necessary to guarantee the High to Low transition in a 30Ω transmission line on the incident wave.
AC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST
CONDITION
T
amb
= +25°C
V
CC
= +5.0V
C
L
= 50pF, R
L
= 500Ω
MIN
t
PLH
t
PHL
Propagation delay
Dna, Dnb to Qn
Waveform 1
6.0
1.0
TYP
8.5
2.0
MAX
11.5
5.0
T
amb
= 0°C to +70°C
V
CC
= +5.0V
±
10%
C
L
= 50pF, R
L
= 500Ω
MIN
6.0
1.0
MAX
12.0
5.0
ns
UNIT
AC WAVEFORMS
For all waveforms, V
M
= 1.5V.
Dna, Dnb
V
M
t
PHL
V
M
t
PLH
Qn
V
M
V
M
SF00005
Waveform 1.
Propagation Delay for Inputs to Output
1998 May 21
4
Philips Semiconductors
Product specification
Quad 2-input NAND 30Ω line driver (open collector)
74F3038
TYPICAL PROPAGATION DELAYS VERSUS LOAD FOR OPEN COLLECTOR OUTPUTS
9
t
PLH
8
7
PROPAGATION DELAY (ns)
6
5
4
3
t
PHL
2
1
0
0
100
200
300
LOAD RESISTOR (Ω)
400
500
600
NOTE:
When using Open-Collector parts, the value of the pull-up resistor greatly affects the value of the t
PLH
. For example, changing the
specified pull-up resistor value from 500Ω to 100Ω will improve the t
PLH
up to 50% with only a slight increase in the t
PHL
. However,
if the value of the pull-up resistor is changed, the user must make certain that the total I
OL
current through the resistor and the total
I
IL
s of the receivers does not exceed the I
OL
maximum specification.
SF01361
TEST CIRCUIT AND WAVEFORMS
V
CC
7.0V
90%
V
IN
PULSE
GENERATOR
R
T
D.U.T.
V
OUT
R
L
NEGATIVE
PULSE
V
M
10%
t
THL (
t
f
)
C
L
R
L
t
TLH (
t
r
)
90%
POSITIVE
PULSE
10%
t
THL (
t
f
)
AMP (V)
90%
V
M
t
w
10%
0V
t
w
V
M
10%
t
TLH (
t
r
)
0V
90%
AMP (V)
Test Circuit for Open Collector Outputs
V
M
DEFINITIONS:
R
L
= Load resistor;
see AC electrical characteristics for value.
C
L
= Load capacitance includes jig and probe capacitance;
see AC electrical characteristics for value.
R
T
= Termination resistance should be equal to Z
OUT
of
pulse generators.
Input Pulse Definition
INPUT PULSE REQUIREMENTS
family
amplitude V
M
74F
3.0V
1.5V
rep. rate
1MHz
t
w
500ns
t
TLH
2.5ns
t
THL
2.5ns
SF00027
1998 May 21
5
嵌入式系统
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