INTEGRATED CIRCUITS
74F583
4-bit BCD adder
Product specification
IC15 Data Handbook
1989 Apr 06
Philips
Semiconductors
Philips Semiconductors
Product specification
4-bit BCD adder
74F583
FEATURES
•
Adds two decimal numbers
•
Full internal look-ahead
•
Fast ripple carry for economical expansion
•
Sum output delay 19.5 ns max.
•
Ripple carry delay 8.5 ns max.
•
Input to ripple delay 13.0 ns max.
•
Supply current 60 mA max.
DESCRIPTION
The 74F583 4-bit coded (BCD) full adder performs the addition of
two decimal numbers (A0–A3, B0–B3). The look-ahead generates
BCD carry terms internally, allowing the 74F583 to then do BCD
addition correctly. For BCD numbers 0 through 9 at A and B inputs,
the BCD sum forms at the output.
In addition of two BCD numbers totalling a number greater than 9, a
valid BCD number and carry will result. For input values larger than
9, the number is converted from binary to BCD. Binary to BCD
conversion occurs by grounding one set of inputs, An or Bn, and
applying a 4-bit binary number to the other set of inputs. If the input
is between 0 and 9, a BCD number occurs at the output. If the
binary input falls between 10 and 15, a carry term is generated. Both
the carry term and the sum are the BCD equivalent of the binary
input. Converting binary numbers greater than 16 may be achieved
by cascading 74F583s.
PIN CONFIGURATION
B1 1
B2
B3
A3
C
n
C
n+4
S2
GND
2
3
4
5
6
7
8
16 V
CC
15 A2
14 A1
13 A0
12 B0
11 S0
10 S1
9
S3
SF01436
TYPE
74F583
TYPICAL
PROPAGATION
DELAY
9.0 ns
TYPICAL
SUPPLY CURRENT
(TOTAL)
45 mA
ORDERING INFORMATION
PACKAGE
16-pin plastic DIP
16-pin plastic SO
COMMERCIAL RANGE
V
CC
= 5 V
±10%
T
amb
= 0°C to +70°C
N74F583N
N74F583D
DRAWING
NUMBER
SOT38-4
SOT109-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
A0–A3
B0–B3
C
n
C
n+4
S0–S3
A operand inputs
B operand inputs
Carry input
Carry output
Sum outputs
DESCRIPTION
74F (U.L.)
HIGH / LOW
1.0 / 2.0
1.0 / 2.0
1.0 / 1.0
50 / 33
50 / 33
LOAD VALUE
HIGH / LOW
20
µA
/ 1.2 mA
20
µA
/ 1.2 mA
20
µA
/ 0.6 mA
1.0 mA / 20 mA
1.0 mA / 20 mA
NOTE:
One (1.0) FAST Unit Load is defined as 20
µA
in the High state and 0.6 mA in the Low state.
LOGIC SYMBOL
13
12
14
1
15
2
4
3
LOGIC SYMBOL (IEEE/IEC)
13
14
Σ
(BCD)
0
P
3
0
Q
3
CI
CO
6
0
11
10
A0 B0 A1 B1 A2 B2 A3 B3
15
4
5
C
n
S0 S1 S2 S3
C
n+4
6
12
1
2
3
Σ
3
7
9
11
V
CC
= Pin 16
GND = Pin 8
10
7
9
5
SF01437
SF01438
1989 Apr 06
2
853–1245 96263
Philips Semiconductors
Product specification
4-bit BCD adder
74F583
LOGIC DIAGRAM
11
S0
12
B0
A0
13
10
S1
B1
1
A1
14
B2
2
A2
15
7
S2
B3
3
A3
4
9
S3
C
n
5
6
C
n+4
V
CC
= PIN 16
GND = PIN 8
SF01435
1989 Apr 06
3
Philips Semiconductors
Product specification
4-bit BCD adder
74F583
ABSOLUTE MAXIMUM RATINGS
Operation beyond the limits set forth in this table may impair the useful life of the device.
Unless otherwise noted, these limits are over the operating free-air temperature range.
SYMBOL
V
CC
V
IN
I
IN
V
OUT
I
OUT
T
amb
T
stg
Supply voltage
Input voltage
Input current
Voltage applied to output in High output state
Current applied to output in Low output state
Operating free-air temperature range
Storage temperature range
PARAMETER
RATING
–0.5 to +7.0
–0.5 to +7.0
–30 to +5
–0.5 to +V
CC
40
0 to +70
–65 to +150
UNIT
V
V
mA
V
mA
°C
°C
RECOMMENDED OPERATING CONDITIONS
SYMBOL
V
CC
V
IH
V
IL
I
IK
I
OH
I
OL
T
amb
Supply voltage
High-level input voltage
Low-level input voltage
Input clamp current
High-level output current
Low-level output current
Operating free-air temperature range
0
PARAMETER
LIMITS
MIN
4.5
2.0
0.8
–18
–1
20
70
NOM
5.0
MAX
5.5
UNIT
V
V
V
mA
mA
mA
°C
DC ELECTRICAL CHARACTERISTICS
Over recommended operating free-air temperature range unless otherwise noted.
SYMBOL
V
O
OH
V
O
OL
V
IK
I
I
I
IH
I
IL
I
OS
I
CC
PARAMETER
High-level
High level output voltage
Low-level
Low level output voltage
Input clamp voltage
Input current at maximum input voltage
High-level input current
Low-level
Low level input current
Short circuit output current
3
Supply current (total)
C
n
only
A
n
and B
n
TEST CONDITIONS
1
V
CC
= MIN, V
IL
= MAX
V
IH
= MIN, I
OH
= MAX
V
CC
= MIN, V
IL
= MAX
V
IH
= MIN, I
OL
= MAX
V
CC
= MIN, I
I
= I
IK
V
CC
= MAX, V
I
= 7.0 V
V
CC
= MAX, V
I
= 2.7 V
V
CC
= MAX, V
I
= 0.5 V
V
CC
= MAX, V
I
= 0.5 V
V
CC
= MAX
V
CC
= MAX
–60
45
±10%
V
CC
±5%
V
CC
±10%
V
CC
±5%
V
CC
LIMITS
MIN
2.5
2.7
3.4
0.30
0.30
–0.73
0.50
0.50
–1.2
100
20
–0.6
–1.2
–150
60
TYP
2
MAX
UNIT
V
V
V
V
V
µA
µA
mA
mA
mA
mA
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V
CC
= 5 V, T
amb
= 25°C.
3. Not more than one output should be shorted at a time. For testing I
OS
, the use of high-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I
OS
tests should be performed last.
1989 Apr 06
4
Philips Semiconductors
Product specification
4-bit BCD adder
74F583
AC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST CONDITION
T
amb
= +25°C
V
CC
= 5 V
C
L
= 50 pF; R
L
= 500
Ω
MIN
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
Propagation delay
An or Bn to Sn
Propagation delay
An or Bn to Sn (INV)
Propagation delay
C
n
to C
n+4
Propagation delay
An or Bn to C
n+4
Propagation delay
C
n
to Sn
Propagation delay
C
n
to Sn (INV)
Waveform 1
Waveform 2
Waveform 1, 2
Waveform 1, 2
Waveform 1
Waveform 2
5.0
5.0
6.0
4.0
3.5
2.5
5.0
5.0
4.0
3.5
6.0
3.5
TYP
13.0
10.5
11.0
8.0
5.0
4.0
8.0
7.5
12.0
8.0
9.5
8.0
MAX
17.0
14.0
18.0
12.0
8.0
7.0
11.5
10.5
15.5
12.5
13.0
11.5
T
amb
= 0°C to +70°C
V
CC
= 5 V
±10%
C
L
= 50 pF; R
L
= 500
Ω
MIN
5.0
5.0
5.0
4.0
3.0
2.0
4.5
4.5
3.5
3.0
5.0
3.0
MAX
18.0
15.0
19.5
12.5
8.5
7.0
13.0
11.5
17.0
13.5
14.5
12.0
ns
ns
ns
ns
ns
ns
UNIT
AC WAVEFORMS
For all waveforms, V
M
= 1.5 V.
An, Bn, C
n
V
M
V
M
An, Bn, C
n
V
M
V
M
t
PLH
Sn, C
n+4
t
PHL
Sn, C
n+4
t
PHL
t
PLH
V
M
V
M
V
M
V
M
SF01439
SF01440
Waveform 1.
Propagation delay for non-inverting outputs
Waveform 2.
Propagation delay for inverting outputs
TEST CIRCUIT AND WAVEFORMS
V
CC
NEGATIVE
PULSE
V
IN
PULSE
GENERATOR
R
T
D.U.T.
V
OUT
90%
V
M
10%
t
THL (
t
f
)
C
L
R
L
t
w
V
M
10%
t
TLH (
t
r
)
0V
90%
AMP (V)
t
TLH (
t
r
)
90%
POSITIVE
PULSE
V
M
10%
t
w
t
THL (
t
f
)
AMP (V)
90%
V
M
10%
0V
Test Circuit for Totem-Pole Outputs
DEFINITIONS:
R
L
= Load resistor;
see AC ELECTRICAL CHARACTERISTICS for value.
C
L
= Load capacitance includes jig and probe capacitance;
see AC ELECTRICAL CHARACTERISTICS for value.
R
T
= Termination resistance should be equal to Z
OUT
of
pulse generators.
Input Pulse Definition
INPUT PULSE REQUIREMENTS
family
amplitude V
M
74F
3.0V
1.5V
rep. rate
1MHz
t
w
500ns
t
TLH
2.5ns
t
THL
2.5ns
SF00006
1989 Apr 06
5
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