Philips Semiconductors
Product specification
Hex 2-input NOR drivers
74F805/74F1805
FEATURES
•
High capacitive drive capability
•
Choice of configuration
•
Typical propagation delay of 2.3ns
TYPICAL
PROPAGATION
DELAY
2.3ns
2.3ns
TYPICAL SUPPLY
CURRENT
( TOTAL)
10mA
10mA
Corner V
CC
and GND – 74F805
Center V
CC
and GND – 74F1805
PIN CONFIGURATION
74F805
D0a 1
D0b 2
Q0 3
D1a 4
D1b 5
Q1 6
D2a 7
D2b 8
Q2 9
GND 10
20 V
CC
19 D5b
18 D5a
17 Q5
16 D4b
15 D4a
14 Q4
13 D3b
12 D3a
11 Q3
TYPE
74F805
74F1805
ORDERING INFORMATION
ORDER CODE
DESCRIPTION
COMMERCIAL RANGE
V
CC
= 5V
±
10%,
T
amb
= 0
°
C to +70
°
C
N74F805N, N74F1805N
N74F805D, N74F1805D
PKG DWG #
SF00456
LOGIC SYMBOL
SOT146-1
SOT163-1
1
2
4
5
7
8
12 13 15 16 18 19
74F805
20–pin plastic DIP
20–pin plastic SOL
INPUT AND OUTPUT LOADING
AND FAN OUT TABLE
PINS
DESCRIPTION
74F
(U.L.)
HIGH/
LOW
1.0/0.033
D0a D0bD1a D1b D2a D2b D3aD3b D4aD4bD5a D5b
LOAD VALUE
HIGH/LOW
Q0 Q1 Q2 Q3 Q4 Q5
Dna – Dnb
Data inputs
20µA/20µA
3
V
CC
= Pin 20
GND = Pin 10
6
9 11
14 17
Q0 – Q5
Data outputs
2400/80
48mA/48mA
NOTE:
One (1.0) FAST unit load is defined as: 20µA in the high
state and 0.6mA in the low state.
SF00457
IEC/IEEE SYMBOL
74F805
1
2
4
5
7
8
12
13
15
16
18
19
17
14
11
9
6
1
3
SF00458
September 14, 1990
2
853-0037 00417
Philips Semiconductors
Product specification
Hex 2-input NOR drivers
74F805/74F1805
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the
operating free air temperature range.)
SYMBOL
V
CC
V
IN
I
IN
V
OUT
I
OUT
T
amb
T
stg
Supply voltage
Input voltage
Input current
Voltage applied to output in high output state
Current applied to output in low output state
Operating free air temperature range
Storage temperature range
PARAMETER
RATING
–0.5 to +7.0
–0.5 to +7.0
–30 to +5
–0.5 to V
CC
96
0 to +70
–65 to +150
UNIT
V
V
mA
V
mA
°
C
°
C
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
V
CC
V
IH
V
IL
I
Ik
I
OH
I
OL
T
amb
Supply voltage
High–level input voltage
Low–level input voltage
Input clamp current
High–level output current
Low–level output current
Operating free air temperature range
0
PARAMETER
MIN
4.5
2.0
0.8
–18
–48
48
+70
NOM
5.0
MAX
5.5
V
V
V
mA
mA
mA
°C
UNIT
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
PARAMETER
TEST CONDITIONS
1
MIN
V
OH
High-level output voltage
V
CC
= MIN, V
IL
= MAX
V
IH
= MIN, I
OH
= MAX
V
OL
Low-level output voltage
V
CC
= MIN, V
IL
= MAX
V
IH
= MIN, I
Ol
= MAX
V
IK
I
I
I
IH
I
IL
I
O
I
CC
Input clamp voltage
Input current at maximum input voltage
High–level input current
Low–level input current
Output current
3
Supply current (total)
I
CCH
I
CCL
V
CC
= MIN, I
I
= I
IK
V
CC
= MAX, V
I
= 7.0V
V
CC
= MAX, V
I
= 2.7V
V
CC
= MAX, V
I
= 0.5V
V
CC
= MAX
V
CC
= MAX
V
IN
= GND
V
IN
= 4.5V
-60
3.0
17
LIMITS
TYP
2
MAX
V
V
0.38
0.38
-0.73
0.55
0.55
-1.2
100
20
-20
-150
5.0
25
V
V
V
µA
µA
µA
mA
mA
mA
UNIT
±
10%V
CC
±
5%V
CC
±
10%V
CC
±
5%V
CC
2.0
2.0
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V
CC
= 5V, T
amb
= 25°C.
3. The output conditions have been chosen to produce a current that closely approximates one half of the true short–circuit output current, I
OS
.
September 14, 1990
4
Philips Semiconductors
Product specification
Hex 2-input NOR drivers
74F805/74F1805
AC ELECTRICAL CHARACTERISTICS
LIMITS
T
amb
= +25
°
C
SYMBOL
PARAMETER
TEST
CONDITION
MIN
t
PLH
t
PHL
Propagation delay
Dna, Dnb to Qn
Waveform 1
1.0
1.0
V
CC
= +5.0V
C
L
= 50pF,
R
L
= 500
Ω
TYP
2.0
2.5
MAX
4.0
4.5
T
amb
= 0
°
C to +70
°
C
V
CC
= +5.0V
±
10%
C
L
= 50pF,
R
L
= 500
Ω
MIN
1.0
1.0
4.0
4.5
1.5
UNIT
MAX
ns
ns
t
sk(o)
Output skew
1,2
Waveform 2
1.5
NOTES:
1. [t
PN
actual – t
PM
actual] for any output compared to any other output where N and M are either LH or HL.
2. Skew times are valid only under same test conditions (temperature, V
CC
, loading, etc.,).
AC WAVEFORMS
Dna, Dnb
V
M
t
PHL
V
M
t
PLH
Qn
Qn
V
M
t
sk(0)
Qn
V
M
V
M
V
M
SF00005
SF00455
Waveform 1. Propagation delay for inverting output
NOTE:
For all waveforms, V
M
= 1.5V.
Waveform 2. Output skew
TEST CIRCUIT AND WAVEFORMS
V
CC
NEGATIVE
PULSE
V
IN
PULSE
GENERATOR
R
T
D.U.T.
V
OUT
90%
V
M
10%
t
THL (
t
f
)
C
L
R
L
t
w
V
M
10%
t
TLH (
t
r
)
0V
90%
AMP (V)
t
TLH (
t
r
)
90%
POSITIVE
PULSE
V
M
10%
t
w
t
THL (
t
f
)
AMP (V)
90%
V
M
10%
0V
Test Circuit for Totem-Pole Outputs
DEFINITIONS:
R
L
= Load resistor;
see AC ELECTRICAL CHARACTERISTICS for value.
C
L
= Load capacitance includes jig and probe capacitance;
see AC ELECTRICAL CHARACTERISTICS for value.
R
T
= Termination resistance should be equal to Z
OUT
of
pulse generators.
Input Pulse Definition
INPUT PULSE REQUIREMENTS
family
amplitude V
M
74F
3.0V
1.5V
rep. rate
1MHz
t
w
500ns
t
TLH
2.5ns
t
THL
2.5ns
SF00006
September 14, 1990
5
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