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NL74VCXH16240DTR

产品描述ALVC/VCX/A SERIES, QUAD 4-BIT DRIVER, INVERTED OUTPUT, PDSO48, TSSOP-48
产品类别逻辑    逻辑   
文件大小269KB,共12页
制造商ON Semiconductor(安森美)
官网地址http://www.onsemi.cn
下载文档 详细参数 选型对比 全文预览

NL74VCXH16240DTR概述

ALVC/VCX/A SERIES, QUAD 4-BIT DRIVER, INVERTED OUTPUT, PDSO48, TSSOP-48

NL74VCXH16240DTR规格参数

参数名称属性值
是否Rohs认证不符合
厂商名称ON Semiconductor(安森美)
零件包装代码TSSOP
包装说明TSSOP, TSSOP48,.3,20
针数48
Reach Compliance Codenot_compliant
Base Number Matches1

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NL74VCXH16240
Low-Voltage 1.8/2.5/3.3V
16-Bit Buffer
With 3.6V–Tolerant Inputs and Outputs
(3–State, Inverting)
The NL74VCXH16240 is an advanced performance, inverting
16–bit buffer. It is designed for very high–speed, very low–power
operation in 1.8V, 2.5V or 3.3V systems.
When operating at 2.5V (or 1.8V) the part is designed to tolerate
voltages it may encounter on either inputs or outputs when interfacing
to 3.3V busses. It is guaranteed to be over–voltage tolerant to 3.6V.
The NL74VCXH16240 is nibble controlled with each nibble
functioning identically, but independently. The control pins may be
tied together to obtain full 16–bit operation. The 3–state outputs are
controlled by an Output Enable (OEn) input for each nibble. When
OEn is LOW, the outputs are on. When OEn is HIGH, the outputs are
in the high impedance state. The data inputs include active bushold
circuitry, eliminating the need for external pull–up resistors to hold
unused or floating inputs at a valid logic state.
http://onsemi.com
48
1
TSSOP–48
DT SUFFIX
CASE 1201
MARKING DIAGRAM
48
Designed for Low Voltage Operation: VCC = 1.65–3.6V
3.6V Tolerant Inputs and Outputs
High Speed Operation: 2.5ns max for 3.0 to 3.6V
3.0ns max for 2.3 to 2.7V
6.0ns max for 1.65 to 1.95V
Static Drive:
±24mA
Drive at 3.0V
±18mA
Drive at 2.3V
±6mA
Drive at 1.65V
Supports Live Insertion and Withdrawal
Includes Active Bushold to Hold Unused or Floating Inputs at a Valid
Logic State
IOFF Specification Guarantees High Impedance When VCC = 0V†
Near Zero Static Supply Current in All Three Logic States (20µA)
Substantially Reduces System Power Requirements
Latchup Performance Exceeds
±300mA
@ 125°C
ESD Performance: Human Body Model >2000V; Machine Model
>200V
1
NL74VCXH16240DT
AWLYYWW
A
WL
YY
WW
= Assembly Location
= Wafer Lot
= Year
= Work Week
PIN NAMES
Pins
OEn
D0–D15
O0–O15
Function
Output Enable Inputs
Inputs
Outputs
†NOTE: To ensure the outputs activate in the 3–state condition, the output
enable pins should be connected to VCC through a pull–up resistor. The
value of the resistor is determined by the current sinking capability of the
output connected to the OE pin.
ORDERING INFORMATION
Device
NL74VCXH16240DT
NL74VCXH16240DTR
Package
TSSOP
TSSOP
Shipping
39 / Rail
2500 / Reel
©
Semiconductor Components Industries, LLC, 2000
1
May, 2000 – Rev. 0
Publication Order Number:
NL74VCXH16240/D

NL74VCXH16240DTR相似产品对比

NL74VCXH16240DTR NL74VCXH16240DT
描述 ALVC/VCX/A SERIES, QUAD 4-BIT DRIVER, INVERTED OUTPUT, PDSO48, TSSOP-48 ALVC/VCX/A SERIES, QUAD 4-BIT DRIVER, INVERTED OUTPUT, PDSO48, TSSOP-48
是否Rohs认证 不符合 不符合
厂商名称 ON Semiconductor(安森美) ON Semiconductor(安森美)
零件包装代码 TSSOP TSSOP
包装说明 TSSOP, TSSOP48,.3,20 TSSOP, TSSOP48,.3,20
针数 48 48
Reach Compliance Code not_compliant not_compliant
Base Number Matches 1 1
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