July 1996
NDP4050 / NDB4050
N-Channel Enhancement Mode Field Effect Transistor
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary,
high cell density, DMOS technology. This very high
density process has been especially tailored to minimize
on-state resistance, provide superior switching
performance, and withstand high energy pulses in the
avalanche and commutation modes. These devices are
particularly suited for low voltage applications such as
automotive, DC/DC converters, PWM motor controls, and
other battery powered circuits where fast switching, low
in-line power loss, and resistance to transients are
needed.
Features
15A, 50V. R
DS(ON)
= 0.10
Ω
@ V
GS
=10V.
Critical DC electrical parameters specified at elevated
temperature.
Rugged internal source-drain diode can eliminate the need
for an external Zener diode transient suppressor.
175°C maximum junction temperature rating.
High density cell design for extremely low R
DS(ON)
.
TO-220 and TO-263 (D
2
PAK) package for both through hole
and surface mount applications.
____________________________________________________________________________________________
D
G
S
Absolute Maximum Ratings
Symbol
V
DSS
V
DGR
V
GSS
I
D
Parameter
Drain-Source Voltage
Drain-Gate Voltage (R
GS
< 1 M
Ω
)
T
C
= 25°C unless otherwise noted
NDP4050
50
50
± 20
± 40
± 15
± 45
50
0.33
-65 to 175
275
NDB4050
Units
V
V
V
Gate-Source Voltage - Continuous
- Nonrepetitive (t
P
< 50 µs)
Drain Current - Continuous
- Pulsed
A
P
D
T
J
,T
STG
T
L
Total Power Dissipation
Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
W
W/°C
°C
°C
© 1997 Fairchild Semiconductor Corporation
NDP4050 Rev. B
Electrical Characteristics
(T
C
= 25°C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
DRAIN-SOURCE AVALANCHE RATINGS
(Note 1)
W
DSS
I
AR
BV
DSS
I
DSS
I
GSSF
I
GSSR
V
GS(th)
R
DS(ON)
I
D(on)
g
FS
C
iss
C
oss
C
rss
t
D(on)
t
r
t
D(off)
t
f
Q
g
Q
gs
Q
gd
Single Pulse Drain-Source Avalanche
Energy
Maximum Drain-Source Avalanche Current
V
DD
= 25 V, I
D
= 15 A
40
15
mJ
A
OFF CHARACTERISTICS
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
V
GS
= 0 V, I
D
= 250 µA
V
DS
= 50 V, V
GS
= 0 V
T
J
= 125°C
Gate - Body Leakage, Forward
Gate - Body Leakage, Reverse
V
GS
= 20 V, V
DS
= 0 V
V
GS
= -20 V, V
DS
= 0 V
V
DS
= V
GS
, I
D
= 250 µA
T
J
= 125°C
Static Drain-Source On-Resistance
V
GS
= 10 V, I
D
= 7.5 A
T
J
= 125°C
On-State Drain Current
Forward Transconductance
V
GS
= 10 V, V
DS
= 10 V
V
DS
= 10 V, I
D
= 7.5 A
V
DS
= 25, V
GS
= 0 V,
f = 1.0 MHz
15
3
5.7
2
1.4
3
2.4
0.078
0.12
50
250
1
100
-100
V
µA
mA
nA
nA
ON CHARACTERISTICS
(Note 1)
Gate Threshold Voltage
4
3.6
0.1
0.165
A
S
V
Ω
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
370
165
50
450
200
100
pF
pF
pF
SWITCHING CHARACTERISTICS
(Note 1)
Turn - On Delay Time
Turn - On Rise Time
Turn - Off Delay Time
Turn - Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V
DS
= 48 V
I
D
= 15 A, V
GS
= 10 V
V
DD
= 30 V, I
D
= 15 A
V
GS
= 10 V, R
GEN
= 25
Ω
8
70
18
37
12.7
3.2
7
20
100
30
50
17
ns
ns
ns
ns
nC
nC
nC
NDP4050 Rev. B
Electrical Characteristics
(T
C
= 25°C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
I
S
I
SM
V
SD
Maximum Continuos Drain-Source Diode Forward Current
Maximum Pulsed Drain-Source Diode Forward Current
Source-Drain Diode Forward Voltage
V
GS
= 0 V, I
S
= 7.5 A
V
GS
= 0 V, I
F
= 15 A,
dI
F
/dt = 100 A/µs
(Note 1)
15
45
0.95
T
J
= 125°C
0.88
25
1.5
46
3.4
1.3
1.2
100
7
A
A
V
t
rr
I
rr
Reverse Recovery Time
Reverse Recovery Current
ns
A
THERMAL CHARACTERISTICS
R
θ
JC
R
θ
JA
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient
3
62.5
°C/W
°C/W
Note:
1. Pulse Test: Pulse Width < 300 µs, Duty Cycle < 2.0%.
NDP4050 Rev. B
Typical Electrical Characteristics
30
2
V
GS
= 2 0 V
I
D
, DRAIN-SOURCE CURRENT (A)
25
12
DRAIN-SOURCE ON-RESISTANCE
10
9.0
R
DS(on)
, NORMALIZED
1.8
1.6
1.4
1.2
1
0.8
0.6
V
GS
= 6.0V
7.0
8.0
9.0
10
8.0
20
15
7.0
10
6.0
12
20
5
5.0
0
0
1
2
3
V
DS
, DRAIN-SOURCE VOLTAGE (V)
4
5
0
5
10
15
20
I
D
, DRAIN CURRENT (A)
25
30
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with Gate
Voltage and Drain Current.
2.2
3
DRAIN-SOURCE ON-RESISTANCE
V
GS
= 10 V
R
DS(on)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
2
1.8
1.6
1.4
1.2
1
0.8
0.6
-50
I
D
= 7.5 A
2.5
V
GS
= 10 V
R
DS(ON)
, NORMALIZED
2
TJ = 125°C
1.5
25°C
1
-55°C
0.5
-25
0
25
50
75
100
125
T
J
, JUNCTION TEMPERATURE (°C)
150
175
0
5
10
15
20
I
D
, DRAIN CURRENT (A)
25
30
Figure 3. On-Resistance Variation
with Temperature.
Figure 4. On-Resistance Variation with Drain
Current and Temperature.
20
1.2
V
DS
= 1 0 V
I
D
, DRAIN CURRENT (A)
15
T = -55°C
J
25°C
125°C
GATE-SOURCE THRESHOLD VOLTAGE
1.1
V
DS
= V
GS
I
D
= 250µA
V
th
, NORMALIZED
1
10
0.9
0.8
5
0.7
0
2
4
6
8
V
GS
, GATE TO SOURCE VOLTAGE (V)
10
0.6
-50
-25
0
25
50
75
100
125
T
J
, JUNCTION TEMPERATURE (°C)
150
175
Figure 5. Drain Current Variation with Gate
Voltage and Temperature
.
Figure 6. Gate Threshold Variation with
Temperature.
NDP4050 Rev. B
Typical Electrical Characteristics
(continued)
1.15
20
DRAIN-SOURCE BREAKDOWN VOLTAGE
I
S
, REVERSE DRAIN CURRENT (A)
I
D
= 250µA
1.1
V
GS
= 0V
10
5
BV
DSS
, NORMALIZED
T J = 125°C
25°C
-55°C
1.05
2
1
0.5
1
0.95
0.2
0.1
0.4
0.9
-50
-25
0
25
50
75
100
125
T
J
, JUNCTION TEMPERATURE (°C)
150
175
0.6
0.8
1
1.2
1.4
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 7. Breakdown Voltage Variation with
Temperature.
Figure 8. Body Diode Forward Voltage Variation
with Current and Temperature
.
700
500
20
C iss
, GATE-SOURCE VOLTAGE (V)
15
I
D
= 15A
V
DS
= 12V
24V
48V
300
CAPACITANCE (pF)
200
C oss
10
100
f = 1 MHz
50
5
V
GS
= 0V
30
1
2
3
5
10
20
30
60
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
V
0
0
5
10
Q
g
, GATE CHARGE (nC)
15
20
C rss
Figure 9. Capacitance Characteristics.
GS
Figure 10. Gate Charge Characteristics.
V
DD
t
d(on)
t
on
t
r
90%
t
off
t
d(off)
90%
t
f
V
IN
D
R
L
V
OUT
DUT
V
GS
V
OUT
R
GEN
10%
10%
INVERTED
G
90%
S
V
IN
10%
50%
50%
PULSE WIDTH
Figure 11. Switching Test Circuit.
Figure 12. Switching Waveforms
.
NDP4050 Rev. B
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