VIPer0P
Datasheet
Zero-power off-line high voltage converter
Features
•
•
•
SO16 narrow
•
•
•
•
•
•
Smart stand-by architecture using the zero-power mode (ZPM)
ZPM management by MCU easily realizable
800 V avalanche-rugged power MOSFET allowing ultra wide VAC input range to
be covered
Embedded HV startup and sense-FET
Current mode PWM controller
Drain current limit protection (OCP)
Wide supply voltage range: 4.5 V to 30 V
Self-supply option allows to remove the auxiliary winding or bias components
Minimized system input power consumption:
–
Less than 4 mW @ 230 V
AC
in ZPM
–
–
Less than 10 mW @ 230 V
AC
in no-load condition
Less than 400 mW @ 230 V
AC
with 250 mW load
•
•
•
Product status link
VIPer0P
Jittered switching frequency reduces the EMI filter cost
–
60 kHz ± 7% (type L)
–
120 kHz ± 7% (type H)
Embedded E/A with 1.2 V reference and separate ground for easy negative
voltage setting
Protections with automatic restart: overload/short circuit (OLP), max. duty cycle
counter, V
CC
clamp
Pulse-skip protection to prevent flux-runaway
Embedded thermal shutdown
Built in soft start for improved system reliability
•
•
•
Applications
•
SMPS for home appliances, home automation, industrial, lighting and
consumers
Figure 1.
Basic application schematic
~ AC
Din
Rin
T
Dout
Vout
Cin
Ccl
Cout
Rcl
GND
VCC
ON
DRAIN
Cs
R1
VIPER0P
OFF
Tactile
switch
COMP
MCU
C1
FB
EAGND SGND
PGND
R2
DS11301
-
Rev 3
-
October 2018
For further information contact your local STMicroelectronics sales office.
www.st.com
VIPer0P
Description
1
Description
The device is a high-voltage converter that smartly integrates an 800 V avalanche rugged power MOSFET with
PWM current-mode control. The power MOSFET with 800 V breakdown voltage allows extended input voltage
range to be applied, as well as to reduce the size of the DRAIN snubber circuit. This IC is capable of meeting the
most stringent energy-saving standards as it has very low consumption and operates in pulse frequency
modulation under light load. The zero-power mode (ZPM) feature enables the IC to work in an idle state, where
the system is totally shutdown. An MCU can be easily connected to the IC for smart ZPM management and it can
be supplied by the IC itself during the idle state. The design of flyback, buck and buck boost converters is
supported. The integrated HV startup, sense FET, error amplifier and oscillator with jitter allow a complete
application to be designed with a minimum component count. In flyback non isolated topology, a negative output
voltage is easily set thanks to the integrated error amplifier with separate ground.
DS11301
-
Rev 3
page 2/36
VIPer0P
Pin setting
2
Pin setting
Figure 2.
Connection diagram
PGND
EAGND
VCC
SGND
FB
COMP
ON
OFF
DRAIN
VIPer0P
DRAIN
DRAIN
DRAIN
N.C.
N.C.
N.C.
N.C.
GIPD210420151108MT
Note:
The PCB copper area for heat dissipation has to be provided under the DRAIN pins.
Table 1.
Pin description
SO16N
1
2
Name
PGND
EAGND
Function
Power ground and MOSFET source.
The pulsed current flowing through the Power MOSFET must be closed on this pin.
The pin must be connected to the same ground plan of SGND with the shortest track.
Error amplifier ground reference.
In case of non-isolated flyback converter with negative output voltage, this pin can be
connected directly to the negative rail. Otherwise, in case of positive output voltage, the pin must be shorted to SGND.
Controller supply.
An external storage capacitor has to be connected across this pin and SGND. The pin, internally
connected to the high-voltage current source, provides the VCC capacitor charging current at startup and, if self-supply
mode is selected, also during steady-state operation. A small bypass capacitor (0.1 μF typ.) in parallel, placed as close as
possible to the IC, is also recommended, for noise filtering purpose.
Signal ground.
All of the groundings of bias components must be tied to a trace going to this pin and kept separate from
the pulsed current return.
Direct feedback.
It is the inverting input of the internal transconductance E/A, which is internally referenced to 1.2 V with
respect to EAGND. In case of non-isolated converter, the output voltage information is directly fed into the pin through a
voltage divider. In case of primary regulation, the FB voltage divider is connected to the VCC. The E/A is disabled
soldering FB to EAGND.
Compensation.
It is the output of the internal E/A. A compensation network is placed between this pin and SGND to
achieve stability and good dynamic performance of the control loop. In case of secondary feedback, the internal E/A must
be disabled and the COMP directly driven by the optocoupler to control the DRAIN peak current setpoint.
ZPM exit.
When the device is in ZPM, the IC is reactivated by forcing this pin to SGND for a debounce time, t
DEB_ON
.
Due to the extremely low level of energy available while in ZPM, the pin can be noise sensitive. A film-type bypass
capacitor from the pin to SGND is therefore recommended in a noisy environment to prevent improper startup of the
device. An internal pull-up resistor keeps the pin voltage at V
ON
level during normal operation.
ZPM enter.
To enter ZPM this pin has to be forced to SGND, for a debounce time t
DEB_OFF
. An internal pull-up resistor
keeps the pin voltage at V
OFF
level during normal operation.
These pins are not internally connected and must be left floating in order to get a safe clearance distance.
MOSFET drain.
The internal high-voltage current source sinks current from this pin to charge the VCC capacitor at startup
and during steady-state operation.
These pins are mechanically connected to the internal metal PAD of the MOSFET in order to facilitate heat dissipation. On
the PCB, some copper area must be placed under these pins in order to decrease the total junction-to-ambient thermal
resistance thus facilitating the power dissipation.
3
VCC
4
SGND
5
FB
6
COMP
7
ON
8
9 to12
OFF
N.C.
13 to 16 DRAIN
DS11301
-
Rev 3
page 3/36
VIPer0P
Electrical and thermal ratings
3
Electrical and thermal ratings
Table 2.
Absolute maximum ratings
Symbol
V
DS
I
DRAIN
V
EAGND
Pin
13 to 16
13 to 16
2
Parameter
(1)
Drain-to-source (ground) voltage
Pulsed drain current (pulse-width limited by SOA)
EAGND voltage (referred to VCC)
EAGND voltage (referred to SGND)
VCC voltage (referred to EAGND)
VCC voltage (referred to SGND)
VCC internal Zener current
FB voltage (referred to EAGND)
FB voltage (referred to VCC)
COMP voltage (referred to SGND)
COMP voltage (referred to VCC)
ON voltage (referred to SGND)
ON voltage (referred to VCC)
OFF voltage (referred to SGND)
OFF voltage (referred to VCC)
Power dissipation @ T
amb
< 50 °C
Junction temperature operating range
Storage temperature
-40
-55
-0.3
-35
-0.3
-35
-0.3
-35
-0.3
-35
-0.3
-0.3
-35
(2)
Min.
-0.3
Max.
800
2
0.3
0.3
35
(2)
35
30
5
(2)
0.3
5
(2)
0.3
5.5
0.3
5.5
0.3
1
150
150
Unit
V
A
V
V
V
V
mA
V
V
V
V
V
V
V
V
W
°C
°C
V
CC
I
CC
V
FB
3
3
5
V
COMP
6
V
ON
7
V
OFF
P
TOT
T
j
T
STG
8
1. Stresses beyond those listed absolute maximum ratings may cause permanent damage to the device.
2. Voltage is internally limited.
Table 3.
Thermal data
Symbol
R
thJP
R
thJA
(1)
Parameter
Thermal resistance junction-pin (dissipated power 1 W)
Thermal resistance junction-ambient (dissipated power 1 W)
Thermal resistance junction-ambient (dissipated power 1 W)
(2)
Max. value
SO16N
35
110
80
°C/W
Unit
1. Derived by characterization.
2. When mounted on a standard single side FR4 board with 100 mm² (0.155
2
inch) of Cu (35 µm thick).
Table 4.
Avalanche characteristics
Symbol
I
AR
Parameter
Avalanche current
Conditions
Pulse-width limited by T
Jmax
Repetitive and non-repetitive
Starting T
J
= 25 °C
I
AS
= I
AR
; V
DS
= 100 V
Min.
Typ.
Max.
0.8
Unit
A
E
AS
Single pulse avalanche energy
(1)
0.5
mJ
DS11301
-
Rev 3
page 4/36
VIPer0P
Electrical characteristics
1. Parameter derived by characterization.
3.1
Electrical characteristics
T
j
= -40 to 125 °C, V
CC
= 9 V (unless otherwise specified).
Table 5.
Power section
Symbol
V
BVDSS
I
DSS
R
DS(on)
Parameter
Breakdown voltage
Drain-source leakage current
Static drain-source on-resistance
I
DRAIN
= 1 mA,
V
COMP
= SGND, T
J
= 25 °C
V
DS
= 400 V, V
COMP
= SGND, T
J
= 25 °C
I
DRAIN
= 200 mA, T
J
= 25 °C
I
DRAIN
= 200 mA, T
J
= 125 °C
V
GS
= 0; V
DS
= 0 to 640 V,
T
J
= 25 °C
10
Test conditions
Min.
800
1
20
40
Typ.
Max.
Unit
V
µA
Ω
C
OSS EQ
Equivalent output capacitance
pF
DS11301
-
Rev 3
page 5/36
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