May 1997
NDH8303N
Dual N-Channel Enhancement Mode Field Effect Transistor
General Description
SuperSOT
TM
-8 N-Channel enhancement mode power field
effect transistors are produced using Fairchild's proprietary,
high cell density, DMOS technology. This very high density
process is especially tailored to minimize on-state resistance.
These devices are particularly suited for low voltage
applications such as notebook computer power management,
and other battery powered circuits where fast switching, and
low in-line power loss are needed in a very small outline surface
mount package.
Features
3.8 A, 20 V. R
DS(ON)
= 0.035
Ω
@ V
GS
= 4.5 V
R
DS(ON)
= 0.045
Ω
@ V
GS
= 2.7 V.
Proprietary SuperSOT
TM
-8 package design using copper
lead frame for superior thermal and electrical capabilities.
High density cell design for extremely low R
DS(ON)
.
Exceptional on-resistance and maximum DC current
capability.
____________________________________________________________________________________________
5
6
7
8
4
3
2
1
Absolute Maximum Ratings
T
A
= 25°C unless otherwise noted
Symbol
V
DSS
V
GSS
I
D
P
D
T
J
,T
STG
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current - Continuous
- Pulsed
Maximum Power Dissipation
(Note 1)
(Note 1)
NDH8303N
20
±8
3.8
15
0.8
-55 to 150
Units
V
V
A
W
°C
Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
R
θJA
R
θJC
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1)
156
40
°C/W
°C/W
(Note 1)
© 1997 Fairchild Semiconductor Corporation
NDH8303N Rev.C
ELECTRICAL CHARACTERISTICS
(T
A
= 25°C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
OFF CHARACTERISTICS
BV
DSS
I
DSS
I
GSSF
I
GSSR
V
GS(th)
R
DS(ON)
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
V
GS
= 0 V, I
D
= 250 µA
V
DS
= 16 V, V
GS
= 0 V
T
J
= 55
o
C
Gate - Body Leakage, Forward
Gate - Body Leakage, Reverse
V
GS
= 8 V, V
DS
= 0 V
V
GS
= -8 V, V
DS
= 0 V
V
DS
= V
GS
, I
D
= 250 µA
T
J
= 125 C
Static Drain-Source On-Resistance
V
GS
= 4.5 V, I
D
= 3.8 A
T
J
= 125 C
V
GS
= 2.7 V, I
D
= 3.3 A
I
D(on)
g
FS
C
iss
C
oss
C
rss
t
D(on)
t
r
t
D(off)
t
f
Q
g
Q
gs
Q
gd
On-State Drain Current
V
GS
= 4.5 V, V
DS
= 5 V
V
GS
= 2.7 V, V
DS
= 5 V
Forward Transconductance
V
DS
= 5 V, I
D
= 3.8 A
V
DS
= 10 V, V
GS
= 0 V,
f = 1.0 MHz
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
700
370
145
pF
pF
pF
15
5
15
S
o
o
20
1
10
100
-100
V
µA
µA
nA
nA
ON CHARACTERISTICS
(Note 2)
Gate Threshold Voltage
0.4
0.3
0.7
0.45
0.029
0.043
0.036
1
0.8
0.035
0.063
0.045
A
V
Ω
SWITCHING CHARACTERISTICS
(Note 2)
Turn - On Delay Time
Turn - On Rise Time
Turn - Off Delay Time
Turn - Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V
DS
= 10 V,
I
D
= 3.8 A, V
GS
= 4.5 V
V
DD
= 5 V, I
D
= 1 A,
V
GS
= 4.5 V, R
GEN
= 6
Ω
8
22
48
23
19.6
2.5
6.5
15
40
90
40
ns
ns
ns
ns
nC
nC
nC
NDH8303N Rev.C
ELECTRICAL CHARACTERISTICS
(T
A
= 25°C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
0.67
(Note 2)
Units
A
V
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
I
S
V
SD
Notes:
1. R
θ
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
θ
JC
is guaranteed by
design while R
θ
CA
is determined by the user's board design.
Maximum Continuous Drain-Source Diode Forward Current
Drain-Source Diode Forward Voltage
V
GS
= 0 V, I
S
= 0.67 A
0.65
1.2
P
D
(
t
) =
R
θ
JA
(
t
)
T
J
−
T
A
=
T
J
−
T
A
R
θ
JC
+
R
θ
CA
(
t
)
=
I
2
(
t
) ×
R
DS
(
ON
)
D
T
J
Typical R
θ
JA
for single device operation using the board layout shown below on 4.5"x5" FR-4 PCB in a still air environment:
156
o
C/W when mounted on a 0.0025 in
2
pad of 2oz copper.
Scale 1 : 1 on letter size paper.
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
NDH8303N Rev.C
Typical Electrical Characteristics
20
2
V
I
D
, DRAIN-SOURCE CURRENT (A)
16
GS
= 4.5V
3.0
2.5
2.0
DRAIN-SOURCE ON-RESISTANCE
1 .8
2.7
R
DS(on)
, NORMALIZED
V
GS
= 2.0V
1 .6
12
1 .4
2.5
2.7
3.0
3.5
4.0
4.5
8
1 .2
1.5
4
1
0
0
0.5
V
DS
1
1.5
2
2.5
3
0 .8
0
4
8
12
16
20
I
D
, DRAIN CURRENT (A)
, DRAIN-SOURCE VOLTAGE (V)
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with Gate
Voltage and Drain Current.
1 .8
2
DRAIN-SOURCE ON-RESISTANCE
DRAIN-SOURCE ON-RESISTANCE
1 .6
I
D
= 3.8A
V
GS
= 4.5V
R
DS(on)
, NORMALIZED
1.5
V
GS
= 4.5 V
TJ = 125°C
R
DS(ON)
, NORMALIZED
1 .4
25°C
1
1 .2
-55°C
0.5
1
0 .8
0 .6
-50
-25
0
25
50
75
100
125
150
0
0
4
I
D
T
J
, JUNCTION TEMPERATURE (°C)
8
12
, DRAIN CURRENT (A)
16
20
Figure 3. On-Resistance Variation with
Temperature.
Figure 4. On-Resistance Variation with Drain
Current and Temperature.
15
1.3
V
DS
= 5V
12
I
D
, DRAIN CURRENT (A)
125°C
GATE-SOURCE THRESHOLD VOLTAGE
T = -55°C
J
25°C
1.2
1.1
1
0.9
0.8
0.7
0.6
0.5
-50
V
DS
= V
GS
I
D
= 250µA
9
6
3
0
0
0.5
1
1.5
2
V
GS
, GATE TO SOURCE VOLTAGE (V)
2.5
V
th
, NORMALIZED
-25
0
25
50
75
100
T , JUNCTION TEMPERATURE (°C)
J
125
150
Figure 5. Transfer Characteristics.
Figure 6. Gate Threshold Variation with
Temperature.
NDH8303N Rev.C
Typical Electrical Characteristics
15
1.15
DRAIN-SOURCE BREAKDOWN VOLTAGE
I
D
= 250µA
1.1
I
S
, REVERSE DRAIN CURRENT (A)
5
1
0 .5
0 .1
V
GS
=0V
TJ = 125°C
25°C
-55°C
BV
DSS
, NORMALIZED
1.05
1
0 .0 1
0.95
0 .0 0 1
0.9
-50
-25
0
T
J
25
50
75
100
, JUNCTION TEMPERATURE (°C)
125
150
0 .0 0 0 1
0
0 .2
0 .4
0.6
0 .8
1
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
1 .2
Figure 7. Breakdown Voltage Variation with
Temperature.
Figure 8. Body Diode Forward Voltage Variation
with Current and Temperature
.
2500
2000
, GATE-SOURCE VOLTAGE (V)
1500
1000
CAPACITANCE (pF)
5
I
D
= 3.8A
4
V
DS
= 5V
10V
15V
Ciss
500
3
Coss
2
300
200
f = 1 MHz
V
GS
= 0 V
V
100
0 .1
0
0 .2
V
DS
GS
Crss
1
0 .5
1
3
5
, DRAIN TO SOURCE VOLTAGE (V)
10
20
0
5
10
15
20
25
Q
g
, GATE CHARGE (nC)
Figure 9. Capacitance Characteristics.
Figure 10. Gate Charge Characteristics.
V
DD
t
d(on)
t
on
t
r
90%
t
off
t
d(off)
90%
t
f
V
IN
D
R
L
V
OUT
DUT
V
GS
V
OUT
R
GEN
10%
10%
INVERTED
G
90%
S
V
IN
10%
50%
50%
PULSE WIDTH
Figure 11. Switching Test Circuit
.
Figure 12. Switching Waveforms.
NDH8303N Rev.C
嵌入式系统
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