Data Sheet No. PD60311
IRS21091(S)PbF
Features
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Floating channel designed for bootstrap operation
Fully operational to +600 V
Tolerant to negative transient voltage, dV/dt
immune
Gate drive supply range from 10 V to 20 V
Undervoltage lockout for both channels
3.3 V, 5 V, and 15 V input logic compatible
Cross-conduction prevention logic
Matched propagation delay for both channels
High-side output in phase with IN input
Logic and power ground +/- 5 V offset
Internal 500 ns deadtime, and programmable
up to 5
µ
s with one external R
DT
resistor
Lower di/dt gate driver for better noise immunity
The dual function DT/SD input turns off both
channels
RoHS compliant
HALF-BRIDGE DRIVER
Product Summary
V
OFFSET
I
O
+/-
V
OUT
t
on/off
(typ.)
Deadtime
600 V max.
120 mA / 250 mA
10 V - 20 V
750 ns & 200 ns
540 ns
Packages
Description
The IRS21091 is a high voltage, high speed power
MOSFET and IGBT driver with dependent high- and
low-side referenced output channels. Proprietary
HVIC and latch immune CMOS technologies enable
ruggedized monolithic construction. The logic input is
8 Lead PDIP
8 Lead SOIC
compatible with standard CMOS or LSTTL output,
IRS21091
IRS21091S
down to 3.3 V logic. The output drivers feature a
high pulse current buffer stage designed for minimum
driver cross-conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in
the high-side configuration which operates up to 600 V.
Typical Connection
V
CC
up to 600 V
V
CC
IN
DT/SD
V
B
HO
V
S
LO
TO
LOAD
IN
DT/SD
COM
(Refer to Lead Assignments for
correct configuration). These dia-
grams show electrical connec-
tions only. Please refer to our
Application Notes and DesignTips
for proper circuit board layout.
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IRS21091(S)PbF
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions.
Symbol
V
B
V
S
V
HO
V
CC
V
LO
DT/SD
V
IN
dV
S
/dt
P
D
Rth
JA
T
J
T
S
T
L
Definition
High-side floating absolute voltage
High-side floating supply offset voltage
High-side floating output voltage
Low-side and logic fixed supply voltage
Low-side output voltage
Programmable deadtime and shutdown pin voltage
Logic input voltage (IN & DT/SD)
Allowable offset supply voltage transient
Package power dissipation @ T
A
≤
+25 °C
Thermal resistance, junction to ambient
Junction temperature
Storage temperature
Lead temperature (soldering, 10 seconds)
(8 Lead PDIP)
(8 Lead SOIC)
(8 Lead PDIP)
(8 Lead SOIC)
Min.
-0.3
V
B
- 25
V
S
- 0.3
-0.3
-0.3
V
SS
- 0.3
V
SS
- 0.3
—
—
—
—
—
—
-50
—
Max.
625
V
B
+ 0.3
V
B
+ 0.3
25
V
CC
+ 0.3
V
CC
+ 0.3
V
CC
+ 0.3
50
1.0
0.625
125
200
150
150
300
Units
V
V/ns
W
°C/W
°C
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IRS21091(S)PbF
Recommended Operating Conditions
The input/output logic timing diagram is shown in Fig.1. For proper operation the device should be used within the
recommended conditions. The V
S
offset rating is tested with all supply biased at a 15 V differential.
Symbol
V
B
V
S
V
HO
V
CC
V
LO
V
IN
DT/SD
T
A
Definition
High-side floating supply absolute voltage
High-side floating supply offset voltage
High-side floating output voltage
Low-side and logic fixed supply voltage
Low-side output voltage
Logic input voltage (IN & DT/SD)
Programmable deadtime and shutdown pin voltage
Ambient temperature
Min.
(Note 1)
V
S
10
0
V
SS
V
SS
-40
V
S
+ 10
Max.
V
S
+ 20
600
V
B
20
V
CC
V
CC
V
CC
125
Units
V
°
C
Note 1: Logic operational for V
S
of -5 V to +600 V. Logic state held for V
S
of -5 V to -V
BS
. (Please refer to the Design Tip
DT97-3 for more details).
Dynamic Electrical Characteristics
V
BIAS
(V
CC
, V
BS
) = 15 V, C
L
= 1000 pF, T
A
= 25 °C, unless otherwise specified.
Symbol
ton
toff
tsd
MT
tr
tf
DT
MDT
Definition
Turn-on propagation delay
Turn-off propagation delay
Shutdown propagation delay
Delay matching, HS & LS turn-on/off
Turn-on rise time
Turn-off fall time
Deadtime: LO turn-off to HO turn-on(DT
LO-HO) &
HO turn-off to LO turn-on (DT
HO-LO)
Deadtime matching = DT
LO - HO
- DT
HO-LO
Min.
—
—
—
—
—
—
400
4
—
—
Typ.
750
200
550
0
100
35
540
5
0
0
Max. Units Test Conditions
950
280
715
70
220
80
680
6
60
600
µs
ns
ns
V
S
= 0 V
R
DT
= 0
Ω
R
DT
= 200 kΩ
R
DT
= 0
Ω
R
DT
= 200 kΩ
V
S
= 0 V
V
S
= 0 V or 600 V
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IRS21091(S)PbF
Static Electrical Characteristics
V
BIAS
(V
CC
, V
BS
) = 15 V, and T
A
= 25 °C unless otherwise specified. The V
IL
, V
IH,
and I
IN
parameters are referenced to
COM and are applicable to the respective input leads: IN and DT/SD. The V
O
, I
O,
and Ron parameters are referenced to
COM and are applicable to the respective output leads: HO and LO.
Symbol
V
IH
V
IL
V
SD,TH
V
OH
V
OL
I
LK
I
QBS
I
QCC
I
IN+
I
IN-
V
CCUV+
V
BSUV+
V
CCUV-
V
BSUV-
V
CCUVH
V
BSUVH
I
O+
I
O-
Definition
Logic “1” input voltage for HO & logic “0” for LO
Logic “0” input voltage for HO & logic “1” for LO
DT/SD input threshold
High level output voltage, V
BIAS
- V
O
Low level output voltage, V
O
Offset supply leakage current
Quiescent V
BS
supply current
Quiescent V
CC
supply current
Logic “1” input bias current
Logic “0” input bias current
V
CC
and V
BS
supply undervoltage positive going
threshold
V
CC
and V
BS
supply undervoltage negative going
threshold
Hysteresis
Output high short circuit pulsed current
Output low short circuit pulsed current
Min. Typ. Max. Units Test Conditions
2.5
—
11.5
—
—
—
20
0.4
—
—
8.0
7.4
0.3
120
250
—
—
13
0.05
0.02
—
75
1.0
5
—
8.9
8.2
0.7
290
600
—
0.8
14.5
0.2
0.1
50
130
1.6
20
5
9.8
9.0
—
—
—
mA
V
O
= 0 V, PW
≤
10 µs
V
O
= 15 V,PW
≤
10 µs
V
µA
mA
µA
V
I
O
= 2 mA
V
B
= V
S
= 600 V
IN = 0 V or 5 V
IN = 0 V or 5 V
R
DT
= 0
Ω
IN = 5 V, DT/SD = 0 V
IN = 0 V, DT/SD = 5 V
V
CC
= 10 V to 20 V
Lead Assignments
1
2
3
4
VCC
IN
DT/SD
COM
VB
HO
VS
LO
8
7
6
5
1
2
3
4
VCC
IN
DT/SD
COM
VB
HO
VS
LO
8
7
6
5
8 Lead PDIP
8 Lead SOIC
IRS21091PbF
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IRS21091SPbF
4
IRS21091(S)PbF
Functional Block Diagrams
VB
UV
DETECT
R
HV
LEVEL
SHIFTER
PULSE
GENERATOR
PULSE
FILTER
R
S
Q
HO
IN
VSS/COM
LEVEL
SHIFT
VS
DT/SD
DEADTIME
UV
DETECT
VCC
LO
COM
VSS/COM
LEVEL
SHIFT
DELAY
Lead Definitions
Symbol Description
IN
DT/SD
V
B
HO
V
S
V
CC
LO
COM
Logic input for high-side and low-side gate driver outputs (HO and LO), in phase with HO
Programmable deadtime lead,disables input/output logic when tied to V
CC
High-side floating supply
High-side gate drive output
High-side floating supply return
Low-side and logic fixed supply
Low-side gate drive output
Low-side return
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