July 1996
NDS8928
Dual N & P-Channel Enhancement Mode Field Effect Transistor
General Description
These dual N- and P -Channel enhancement mode power
field effect transistors are produced using Fairchild's
proprietary, high cell density, DMOS technology. This very high
density process is especially tailored to minimize on-state
resistance and provide superior switching performance. These
devices are particularly suited for low voltage applications such
as notebook computer power management and other battery
powered circuits where fast switching, low in-line power loss,
and resistance to transients are needed.
Features
N-Channel 5.5A, 20V, R
DS(ON)
=0.035
Ω
@ V
GS
=4.5V
R
DS(ON)
=0.045
Ω
@ V
GS
=2.7V
P-Channel -3.8A, -20V, R
DS(ON)
=0.07
Ω
@ V
GS
=-4.5V
R
DS(ON)
=0.1
Ω
@ V
GS
=-2.7V.
High density cell design for extremely low R
DS(ON)
.
High power and current handling capability in a widely used
surface mount package.
Dual (N & P-Channel) MOSFET in surface mount package.
________________________________________________________________________________
5
4
3
2
1
6
7
8
Absolute Maximum Ratings
Symbol
V
DSS
V
GSS
I
D
P
D
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current - Continuous
- Pulsed
T
A
= 25°C unless otherwise noted
N-Channel
20
8
(Note 1a)
P-Channel
-20
-8
-3.8
-15
2
Units
V
V
A
5.5
20
Power Dissipation for Dual Operation
Power Dissipation for Single Operation
(Note 1a)
(Note 1b)
(Note 1c)
W
1.6
1
0.9
-55 to 150
°C
T
J
,T
STG
Operating and Storage Temperature Range
THERMAL CHARACTERISTICS
R
θ
JA
R
θ
JC
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
78
40
°C/W
°C/W
© 1997 Fairchild Semiconductor Corporation
NDS8928 Rev.D
Electrical Characteristics
(T
A
= 25°C unless otherwise noted)
Symbol
BV
DSS
I
DSS
Parameter
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
Conditions
V
GS
= 0 V, I
D
= 250 µA
V
GS
= 0 V, I
D
= -250 µA
V
DS
= 16 V, V
GS
= 0 V
T
J
= 55
o
C
V
DS
= -16 V, V
GS
= 0 V
T
J
= 55
o
C
I
GSSF
I
GSSR
V
GS(th)
Gate - Body Leakage, Forward
Gate - Body Leakage, Reverse
Gate Threshold Voltage
V
GS
= 8 V, V
DS
= 0 V
V
GS
= -8 V, V
DS
= 0 V
V
DS
= V
GS
, I
D
= 250 µA
T
J
= 125 C
V
DS
= V
GS
, I
D
= -250 µA
T
J
= 125
o
C
R
DS(ON)
Static Drain-Source On-Resistance
V
GS
= 4.5 V, I
D
= 5.5 A
T
J
= 125
o
C
V
GS
= 2.7 V, I
D
= 5 A
V
GS
= -4.5 V, I
D
= -3.8 A
T
J
= 125
o
C
V
GS
= -2.7 V, I
D
= -3.2 A
I
D(on)
On-State Drain Current
V
GS
= 4.5 V, V
DS
= 5 V
V
GS
= 2.7 V, V
DS
= 5 V
V
GS
= -4.5 V, V
DS
= -5 V
V
GS
= -2.7 V, V
DS
= -5 V
g
FS
Forward Transconductance
V
DS
= 10 V, I
D
= 5.5 A
V
DS
= -10 V, I
D
= -3.8 A
DYNAMIC CHARACTERISTICS
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
N-Channel
V
DS
= 10 V, V
GS
= 0 V,
f = 1.0 MHz
P-Channel
V
DS
= -10 V, V
GS
= 0 V,
f = 1.0 MHz
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
760
1120
440
470
160
145
pF
pF
pF
N-Ch
P-Ch
P-Ch
N-Ch
20
10
-15
-5
14
9
S
P-Ch
N-Ch
P-Ch
o
Type
N-Ch
P-Ch
N-Ch
P-Ch
All
All
N-Ch
Min
20
-20
Typ
Max
Units
V
V
OFF CHARACTERISTICS
1
10
-1
-10
100
-100
0.4
0.3
-0.4
-0.3
0.6
0.35
-0.7
-0.5
0.029
0.04
0.035
0.06
0.085
0.082
1
0.8
-1
-0.8
0.035
0.063
0.045
0.07
0.126
0.1
µA
µA
µA
µA
nA
nA
V
ON CHARACTERISTICS
(Note 2)
Ω
A
NDS8928 Rev.D
Electrical Characteristics
(T
A
= 25°C unless otherwise noted)
Symbol
t
D(on)
t
r
t
D(off)
t
f
Q
g
Q
gs
Q
gd
Parameter
Turn - On Delay Time
Turn - On Rise Time
Turn - Off Delay Time
Turn - Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
N-Channel
V
DS
= 10 V,
I
D
= 5.5 A, V
GS
= 4.5 V
P-Channel
V
DS
= -10 V,
I
D
= -3.8 A, V
GS
= -4.5 V
Conditions
N-Channel
V
DD
= 5 V, I
D
= 1 A,
V
GEN
= 4.5 V, R
GEN
= 6
Ω
P-Channel
V
DD
= -5 V, I
D
= -1 A,
V
GEN
= -4.5 V, R
GEN
= 6
Ω
Type
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
I
S
V
SD
Maximum Continuous Drain-Source Diode Forward Current
Drain-Source Diode Forward Voltage
V
GS
= 0 V, I
S
= 1.3 A
V
GS
= 0 V, I
S
= -1.3 A
Notes:
1. R
θ
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
θ
JC
is guaranteed by
design while R
θ
CA
is determined by the user's board design.
Min
Typ
11
13
30
53
54
60
20
33
21
19
2.3
2.4
6.8
5.5
Max
20
20
50
70
80
80
40
40
30
30
Units
ns
ns
ns
ns
nC
nC
nC
SWITCHING CHARACTERISTICS
(Note 2)
N-Ch
P-Ch
(Note 2)
(Note 2)
1.3
-1.3
0.8
-0.75
1.2
-1.2
A
V
N-Ch
P-Ch
P
D
(
t
) =
R
θ
J A
t
)
(
T
J
−
T
A
=
R
θ
J C
R
θ
CA
t
)
+
(
T
J
−
T
A
=
I
2
(
t
) ×
R
DS
(
ON
)
D
T
J
Typical R
θ
JA
for single device operation using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment:
a. 78
o
C/W when mounted on a 0.5 in
2
pad of 2oz copper.
b. 125
o
C/W when mounted on a 0.02 in
2
pad of 2oz copper.
c. 135
o
C/W when mounted on a 0.003 in
2
pad of 2oz copper.
1a
1b
1c
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
NDS8928 Rev.D
Typical Electrical Characteristics: N-Channel
30
I
D
, DRAIN-SOURCE CURRENT (A)
25
20
15
10
5
0
DRAIN-SOURCE ON-RESISTANCE
R
DS(on)
, NORMALIZED
V
GS
=4.5V
3.5
3.0
2.7
2.5
2
1.8
1.6
2.0
V
GS
= 2.0V
1.4
2.5
1.2
1
0.8
2.7
3.0
3.5
4.5
1.5
0
0.5
V
DS
1
1.5
2
, DRAIN-SOURCE VOLTAGE (V)
2.5
3
0
5
10
15
20
25
30
I
D
, DRAIN CURRENT (A)
Figure 1. N-Channel On-Region Characteristics.
Figure 2. N-Channel On-Resistance Variation with Gate
Voltage and Drain Current.
1.6
2
DRAIN-SOURCE ON-RESISTANCE
I
D
= 5.5A
V
GS
= 4.5V
R
DS(on)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
1.4
V
GS
= 4.5 V
TJ = 125°C
R
DS(ON)
NORMALIZED
,
1.5
1.2
1
25°C
1
0.8
-55°C
0.6
-50
-25
0
25
50
75
100
125
150
0.5
0
5
T
J
, JUNCTION TEMPERATURE (°C)
10
15
20
I , DRAIN CURRENT (A)
D
25
30
Figure 3. N-Channel On-Resistance Variation with
Temperature.
Figure 4. N-Channel On-Resistance Variation with
Drain Current and Temperature.
30
GATE-SOURCE THRESHOLD VOLTAGE
V
DS
= 5.0V
25
I
D
, DRAIN CURRENT (A)
20
15
10
5
0
T = -55°C
J
1.4
25°C
125°C
V
th
, NORMALIZED
1.2
V
DS
= V
GS
I
D
= 250µA
1
0.8
0.6
0
0.5
1.5
2
2.5
3
V
GS
, GATE TO SOURCE VOLTAGE (V)
1
3.5
4
0.4
-50
-25
0
25
50
75
100
T
J
, JUNCTION TEMPERATURE (°C)
125
150
Figure 5. N-Channel Transfer
Characteristics.
Figure 6. N-Channel Gate Threshold Variation
with Temperature.
NDS8928 Rev.D
Typical Electrical Characteristics: N-Channel
(continued)
DRAIN-SOURCE BREAKDOWN VOLTAGE
1.12
I
D
= 250µA
I
S
, REVERSE DRAIN CURRENT (A)
30
10
5
1
V
GS
= 0V
BV
DSS
, NORMALIZED
1.08
TJ = 125°C
0.1
1.04
25°C
-55°C
1
0.01
0.96
0.001
0.92
-50
0.0001
-25
0
25
50
75
100
T
J
, JUNCTION TEMPERATURE (°C)
125
150
0
0.2
0.4
0.6
0.8
1
1.2
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
1.4
Figure 7. N-Channel Breakdown Voltage Variation
with Temperature.
Figure 8. N-Channel Body Diode Forward Voltage
Variation with Current and Temperature
.
3000
2000
5
V
GS
, GATE-SOURCE VOLTAGE (V)
I
D
= 5.5A
4
V
DS
= 5V
15V
10V
CAPACITANCE (pF)
1000
C iss
C oss
3
500
300
200
2
f = 1 MHz
V
GS
= 0 V
C rss
1
100
0.1
0.2
0.5
1
2
5
10
20
0
0
5
10
15
20
25
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Q
g
, GATE CHARGE (nC)
Figure 9. N-Channel Capacitance Characteristics.
Figure 10. N-Channel Gate Charge Characteristics.
g
FS
, TRANSCONDUCTANCE (SIEMENS)
25
V
DS
= 5.0V
20
TJ = -55°C
25°C
15
125°C
10
5
0
0
5
10
I
D
, DRAIN CURRENT (A)
15
20
Figure 11. N-Channel Transconductance Variation
with Drain Current and Temperature.
NDS8928 Rev.D
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
