NJW1163/A
AUDIO PROCESSOR with Subwoofer Output
s
GENERAL DESCRIPTION
The
NJW1163/A
is a sound processor with subwoofer
output includes all of functions processing audio signal for
TV, such as tone control, balance, volume, mute, and AGC
functions.
Also the
NJW1163/A
includes the LPF for subwoofer
output and bass boost function.
The original surround system reproduces natural surround
sound and clear vocal orientation.
2
All of internal status and variables are controlled by I C
BUS interface.
s
PACKAGE OUTLINE
NJW1163V
NJW1163AL
s
FEATURES
7.5 to 13V
q
Operating Voltage
q
3ch Output(Lch, Rch, Subwoofer ch) / 2ch Output(Lch, Rch)
q
LPF Filter (Adjustable cut off frequency by external parts)
q
AGC Circuit (It reduces volume difference among input sources.)
2
Adjustable AGC boost level by external parts and AGC compression level by I C BUS
q
eala(NJRC Original Surround System)
q
Simulated Stereo
2
q
I C BUS Interface
q
Bi-CMOS Technology
NJW1163:
SSOP32
q
Package Outline
NJW1163A:
SDIP32
s
BLOCK DIAGRAM
AGC1
SS-FIL
TONE TONE
-Ha -La LF1 LF2 LF3
OUTa
SCL SDA ADR
IN a
VOL1
TONE
VOL2
I
2
CBUS
Interface
AGC
eal a
&
Simulated
Stereo
CVA
CVB
CVW
CTH
CTL
CSR
PORT1
PORT0
AUX1
AUX0
LPF
VOL2
Trimmer
IN b
VOL1
TONE
VOL2
Bias
GND
V+
AGC2
SR-FIL
TONE TONE
-Hb -Lb
OUTb
OUTw
Vref
-1-
NJW1163/A
s
PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
INa
SR-FIL
SS-FIL
TONE-Ha
TONE-La
OUTW
OUTa
AGC1
AUX0
AUX1
PORT0
PORT1
ADR
SDA
SCL
GND
INb
LF2
LF3
LF1
TONE-Hb
TONE-Lb
OUTb
AGC2
CVA
CVB
CVW
CTH
CTL
CSR
Vref
V+
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Symbol
INa
SR-FIL
SS-FIL
TONE-Ha
TONE-La
OUTw
OUTa
AGC1
AUX0
(
✳
)
AUX1
PORT0
PORT1
ADR
SDA
SCL
GND
Ach input terminal
Function
No.
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
(
✳
)
Symbol
V+
Vref
CSR
CTL
CTH
CVW
CVB
CVA
AGC2
OUTb
TONE-Lb
TONE-Hb
LF1
LF3
LF2
INb
Function
Supply voltage terminal
Reference voltage terminal
DAC output terminal for surround control
DAC output terminal for tone control (bass)
DAC output terminal for tone control (treble)
Bch DAC output terminal for LPF trimmer
Bch DAC output terminal for volume and balance
Ach DAC output terminal for volume and balance
AGC boost level setting terminal
Bch output terminal
Bch tone control (bass) filter terminal
Bch tone control (treble) filter terminal
LPF filter1 terminal
LPF filter3 terminal
LPF filter2 terminal
Bch input terminal
Surround filter terminal
Simulated stereo filter terminal
Ach tone control (treble) filter terminal
Ach tone control (bass) filter terminal
Subwoofer output terminal
Ach output terminal
AGC attack and recovery time setting terminal
Auxiliary 3 values voltage output terminal
(0.0V, 2.5V, 5V)
Auxiliary 2 values voltage output terminal
(0.0V, V+)
Logic input terminal
Logic input terminal
Slave address setting terminal
I
2
C data terminal
I C cock terminal
Ground terminal
2
The AUX0 terminal should be connected via the protection resistance to 5V device.
-2-
NJW1163/A
s
ABSOLUTE MAXIMUM RATING (Ta=25°C)
PARAMETER
Supply Voltage
Power Dissipation
Operating Temperature Range
Storage Temperature Range
SYMBOL
V
+
RATING
15
700
-20 to +75
-40 to +125
UNIT
V
mW
°C
°C
P
D
Topr
Tstg
s
ELECTRICAL CHARACTERISTICS
( Ta=25°C, V+=9V, Rg=600Ω, R
L
=47kΩ, Vin=100mVrms/1kHz unless otherwise specified)
Condition
PARAMETER
SYMBOL
Input
Output
INa
INb
Operating Voltage
Supply Current
Reference Voltage
Maximum Input Voltage
Maximum
Output Voltage
Channel Balance
Balance Boost A
Balance Cut A
Balance Boost B
Balance Cut B
Trimmer Boost
Trimmer Cut
Total Harmonic Distortion
Maximum Gain
Minimum Gain
Channel Separation
Output Noise 1
Output Noise 2
Output Noise 3
V
I
CC
V
REF
V
IM
V
OM
G
CB
BA
BST
BA
CUT
BB
BST
BB
CUT
TR
BST
TR
CUT
THD
G
VMAX
G
VMIN
CS
V
NO1
V
NO2
V
NO3
+
MIN.
7.5
-
4.0
2.8
-
-1.5
-2.0
-
-2.0
-
16.0
-49.0
-
-2.0
-
-
-
-
-
TYP.
9.0
13
4.5
3.0
2.5
0.0
0.0
-
0.0
-
18.0
-44.0
-
0.0
-
-
-90
(31.6)
-106
(5.0)
-100
(10.0)
MAX.
13.0
25
5.0
-
-
1.5
2.0
-70
2.0
-70
20.0
-39.0
0.5
2.0
-70
-70
-85
(56.2)
-96
(15.8)
-90
(30.0)
UNIT
V
mA
V
Vrms
Vrms
dB
dB
dB
dB
dB
dB
dB
%
dB
dB
dB
dBV
(µVrms)
dBV
(µVrms)
dBV
(µVrms)
No Signal
No Signal
VOL=-20dB,THD=1%
VOL=0dB, THD=1%
VOL=0dB
CHS=”0”,BAL=”111111”
CHS=”1”, BAL=”111111”
Vin = 1Vrms
CHS=”1”,BAL=”111111”
CHS=”0”, BAL=”111111”
Vin = 1Vrms
VOL=0dB
TRIM = +18dB
VOL=0dB
TRIM = -44dB
Vo=0.5Vrms,
BW=400Hz to 30kHz
VOL=0dB
VOL=MUTE
Vin=1Vrms
Vin=1Vrms
BW=400Hz to 30kHz
VOL=0dB
BW=400Hz to 30kHz
VOL=MUTE
BW=400Hz to 30kHz
VOL=MUTE,TRIM=MUTE
BW=400Hz to 30kHz
-
-
-
V
in
-
V
in
-
-
V
in
V
in
V
in
V
in
V
in
V
in
V
in
-
V
in
-
V
in
-
V
in
-
-
-
-
-
-
-
-
V
in
-
V
in
-
V
in
V
in
V
in
V
in
V
in
V
in
-
V
in
-
V
in
-
V
in
-
V
in
-
-
-
-
-
-
OUTa
OUTb
OUTa
OUTb
-
OUTa
OUTa
OUTb
OUTb
OUTw
OUTw
OUTa
OUTb
OUTa
OUTb
OUTa
OUTb
OUTb
OUTa
-
-
-
BW : Band Width
- 3 -
NJW1163/A
s
ELECTRICAL CHARACTERISTICS
(Ta=25°C, V+=9V, Rg=600Ω, R
L
=47kΩ, Vin=100mVrms/1kHz unless otherwise specified)
Condition
PARAMETER
SYMBOL
Input
Output
INa
INb
MIN.
TYP.
MAX.
UNIT
♦
TONE
High Frequency Boost
High Frequency Flat
High Frequency Cut
Low Frequency Boost
Low Frequency Flat
Low Frequency Cut
HF
BST
HF
FLT
HF
CUT
LF
BST
LF
FLT
LF
CUT
BCT=”1”
TREB=+15dB, f=10kHz
TREB=0, f=10kHz
BCT=”0”
TREB=-15dB, f=10kHz
BCB=”1”
BASS=+15dB, f=100Hz
BASS=0, f=100Hz
BCB=”0”
BASS=-15dB, f=100Hz
Vin=50mVrms, f=1kHz
AGC=”1”
Vin=100mVrms,f=1kHz
AGC=”1”, AGCL=”00”
Vin=200mVrms, f=1kHz
AGC=”1”, AGCL=”01”
Vin=300mVrms, f=1kHz
AGC=”1”, AGCL=”10”
Vin=400mVrms, f=1kHz
AGC=”1”, AGCL=”11”
Vin=2Vrms, f=1kHz
AGC=”1”
f=100Hz
Surround Effect1
f=100Hz
Surround Effect1
f=100 Hz
Surround Effect2
f=100Hz
Surround Effect2
f=1kHz, Simulated Stereo
f=1kHz, Simulated Stereo
Input : High
Input : Low
Logic Output : High
Logic Output : Mid
Logic Output : Low
Logic Output : High
Logic Output : Low
Input : High
Input : Low
V
in
-
V
in
-
V
in
-
V
in
-
V
in
-
V
in
-
V
in
V
in
V
in
V
in
V
in
V
in
V
in
V
in
V
in
V
in
V
in
V
in
V
in
-
V
in
-
V
in
-
V
in
-
V
in
V
in
-
V
in
-
V
in
-
V
in
-
V
in
-
V
in
-
V
in
OUTa
OUTb
OUTa
OUTb
OUTa
OUTb
OUTa
OUTb
OUTa
OUTb
OUTa
OUTb
OUTa
OUTb
OUTa
OUTb
OUTa
OUTb
OUTa
OUTb
OUTa
OUTb
OUTa
OUTb
OUTa
OUTb
OUTb
OUTa
OUTa
OUTb
OUTb
OUTa
OUTa
OUTb
12.5
-2.0
-17.5
12.5
-2.0
-17.5
15.0
0.0
-15.0
15.0
0.0
-15.0
17.5
2.0
-12.5
17.5
2.0
-12.5
dB
dB
dB
dB
dB
dB
xAGC
AGC Boost
AGC Flat1
AGC Flat2
AGC Flat3
AGC Flat4
AGC Cut
xSURROUND
Surround Gain1
Surround Gain2
Surround Gain3
Surround Gain4
Simulated Stereo1
Simulated Stereo2
SR
GAIN1
SR
GAIN2
SR
GAIN3
SR
GAIN 4
SR
SIM1
SR
SIM2
-
V
in
-
V
in
-
V
in
-
V
in
V
in
V
in
6.3
2.1
10.7
8.4
1.0
1.0
3.5
-
4.5
2.0
0
3.5
0
3.5
-
8.3
4.1
12.7
10.4
3.0
3.0
-
-
-
-
-
-
-
-
-
10.3
6.1
14.7
12.4
5.0
5.0
-
1.0
5.5
3.0
0.5
V+
0.5
-
1.0
dB
dB
dB
dB
dB
dB
AGC
BST
AGC
FLT1
AGC
FLT2
AGC
FLT3
AGC
FLT4
AGC
CUT
V
in
V
in
V
in
V
in
V
in
V
in
V
in
V
in
V
in
V
in
V
in
1.5
-2.5
-2.5
-2.5
-2.5
-14
3.5
0.0
0.0
0.0
0.0
-10
5.5
2.5
2.5
2.5
2.5
-6.0
dB
dB
dB
dB
dB
dB
xPORT,
AUX
PORT0,1 Input Voltage
V
PTIN
-
-
-
V
AUX0 Output Voltage
V
AUX0
-
-
-
V
AUX1 Output Voltage
ADR Input Voltage
V
AUX1
V
ADR
-
-
-
-
-
-
V
V
-4-
NJW1163/A
s
I C BUS BLOCK CHARACTERISTICS (SDA,SCL)
PARAMETER
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
Low Level Output Voltage (3mA at SDA pin)
Maximum Output Current
Maximum Clock Frequency
Data Change Minimum Waiting Time
Data Transfer Start Minimum Waiting Time
Low Level Clock Pulse Width
High Level Clock Pulse Width
Minimum Start Preparation Waiting Time
Minimum Data Hold Time
Minimum Data Preparation Time
Rise Time
Fall Time
Minimum Stop Preparation Waiting Time
SYMBOL
V
IH
V
IL
I
IH
I
IL
V
OL
I
OL
f
SCL
t
BUF
t
HD:STA
t
LOW
t
HIGH
t
SU:STA
t
HD:DAT
t
SU:DAT
t
R
t
F
t
SU:STO
MIN.
3.0
0
-
-
0
-3.0
-
4.7
4.0
4.7
4.0
4.7
0
250
-
-
4.0
TYP.
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
MAX.
5.0
1.5
10
10
0.4
-
100
-
-
-
-
-
3.45
-
1.0
300
-
UNIT
V
V
µA
µA
V
mA
kHz
2
µs
µs
µs
µs
µs
µs
ns
µs
ns
µs
I C BUS Load Condition:
2
Pull up resistance 4kΩ (Connected to +5V)
Load capacitance 200pF (Connected to GND)
SDA
t
BUF
t
R
t
F
t
HD:STA
SCL
t
HD:STA
t
LOW
P
S
t
HD:DAT
t
HIGH
t
SU:DAT
Sr
t
SU:STA
t
SU:STO
P
- 5 -
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
