NM27C020 2,097,152-Bit (256K x 8) UV Erasable CMOS EPROM
Connection Diagrams
27C080
27C040 27C010
27C512
27C256
27C256
27C512
27C010
27C040
27C080
A19
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
GND
Note:
XX/V
PP
XX/V
PP
A16
A16
A15
A15
A12
A12
A7
A7
A6
A6
A5
A5
A4
A4
A3
A3
A2
A2
A1
A1
A0
A0
O0
O0
O1
O1
O2
O2
GND
GND
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
GND
V
PP
A12
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
GND
XX/V
PP
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
V
CC
V
CC
XX/PGM
XX/PGM
A17
XX
V
CC
V
CC
A14
A14
A14
A14
A13
A13
A13
A13
A8
A8
A8
A8
A9
A9
A9
A9
A11
A11
A11
A11
OE
OE
OE/V
PP
OE
A10
A10
A10
A10
CE/PGM CE/PGM CE/PGM
CE
O7
O7
O7
O7
O6
O6
O6
O6
O5
O5
O5
O5
O4
O4
O4
O4
O3
O3
O3
O3
V
CC
A18
A17
A14
A13
A8
A9
A11
OE
A10
CE
O7
O6
O5
O4
O3
V
CC
A18
A17
A14
A13
A8
A9
A11
OE/V
PP
A10
CE/PGM
O7
O6
O5
O4
O3
DS010835-10
Compatible EPROM pin configurations are shown in the blocks adjacent to the NM27C020 pins.
Parameter/Order Number
NM27C020 Q, V, N 100
NM27C020 Q, V, N 120
NM27C020 Q, V, N 150
Access Time (ns)
4
3
2
1 32 31 30
100
120
150
A7
A6
A5
A4
A3
A2
A1
A0
O0
5
6
7
8
9
10
11
12
13
14 15 16 17 18 19 20
A12
A15
A16
VPP
VCC
PGM
A17
29
28
27
26
25
24
23
22
21
Commercial Temperature Range
(0
°
C to +70
°
C) V
CC
= 5V
±
10%
PLCC Pin Configuration
All versions are guaranteed to function at slower speeds.
Extended Temperature Range
(-40
°
C to +85
°
C) V
CC
= 5V
±
10%
Parameter/Order Number
NM27C020 QE, VE, TE, NE 120
NM27C020 QE, VE, TE, NE 150
A14
A13
A8
A9
A11
OE
A10
CE
O7
Access Time (ns)
120
150
O1
O2
GND
O3
O4
O5
O6
DS010835-3
Top View
Pin Names
A0 –A17
CE
OE
O0 –O7
PGM
XX
Addresses
Chip Enable
Output Enable
Outputs
Program
Don’t Care (During Read)
2
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NM27C020 2,097,152-Bit (256K x 8) UV Erasable CMOS EPROM
Connection Diagrams
(Continued)
NM
Ordering Information
27
C 020 Q E 150
Fairchild
Memory
EPROM
CMOS
Access Time
100 = 100 ns
120 = 120 ns
150 = 150 ns
Operating Temp
Blank = Commercial Temp.
E = Extended Temp.
Packaging
Q = Ceramic DIP
V = PLCC
N = PDIP
Memory Size
020 = 2 Mbit
DS010835-9
3
www.fairchildsemi.com
NM27C020 2,097,152-Bit (256K x 8) UV Erasable CMOS EPROM
Absolute Maximum Ratings (Note 1)
Storage Temperature
All Input Voltage Except A9 with
Respect to Ground (Note 13)
V
PP
and A9 with Respect to Ground
V
CC
Supply Voltage with
Respect to Ground
ESD Protection
-65°C to +125°C
All Output Voltages with
Respect to Ground (Note 13)
V
CC
+ 10V to GND -0.6V
Operating Range
-0.6V to +7V
-0.6V to +14V
-0.6V to +7V
>2000V
Range
Commercial
Industrial
Temperature
0°C to +70°C
-40°C to +85°C
V
CC
Tolerance
+5V
+5V
±10
±10%
DC Read Characteristics
Over Operating Range with V
PP
= V
CC
Symbol
V
IL
V
IH
V
OL
V
OH
I
SB1
(Note 4)
I
SB2
I
CC
(Note 2)
Parameter
Input Low Level
Input High Level
Output Low Voltage
Output High Voltage
V
CC
Standby Current (CMOS)
V
CC
Standby Current (TTL)
V
CC
Active Current
Test Conditions
Min
-0.5
2.0
Max
0.8
V
CC
+1
-0.4
Units
V
V
V
V
I
OL
= 2.1 mA
I
OH
= -400
µA
CE = V
CC
±
0.3V
CE = V
IH
CE, OE = V
IL
I/O = 0 mA, f = 5 MHz
Inputs = V
IH
or V
IL
V
PP
= V
CC
VCC - 0.4
V
IN
= 5.5 or GND
V
OUT
= 5.5V or GND
-1
-10
Commercial
Industrial
3.5
100
1
30
30
10
V
CC
1
10
µA
mA
mA
µA
V
µA
µA
I
PP
VPP
I
LI
I
LO
V
PP
Supply Current
V
PP
Read Voltage
Input Load Current
Output Leakage Current
AC Read Characteristics
Over Operating Range with V
PP
= V
CC
Symbol
t
ACC
t
CE
t
OE
t
DF
(Note 3)
t
OH
Parameter
Address to Output Delay
CE to Output Delay
OE to Output Delay
Output Disable to Output Float
Output Hold from Addresses, CE
or OE , Whichever Occurred First
100
Min
Max
100
100
40
40
0
120
Min
Max
120
120
45
45
0
150
Min
Max
150
150
50
50
0
Units
ns
ns
ns
ns
ns
Note 1:
Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of
the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions
for extended periods of time may affect device reliability.
Note 2:
The supply current is the sum of I
CC
and I
PP
. The maximum current value is with Outputs O0 to O7 unloaded.
Note 3:
This parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no longer driven-see timing diagram.
Note 4:
CMOS inputs: V
IL
= GND 10.3V, V
IH
= V
CC
10.3V.
4
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NM27C020 2,097,152-Bit (256K x 8) UV Erasable CMOS EPROM
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