MB95560H Series
MB95570H Series
MB95580H Series
New 8FX 8-bit Microcontrollers
The MB95560H/570H/580H is a series of general-purpose, single-chip microcontrollers. In addition to a compact instruction set, the
microcontrollers of this series contain a variety of peripheral resources.
Features
■
F
2
MC-8FX CPU core
❐
Instruction set optimized for controllers
• Multiplication and division instructions
• 16-bit arithmetic operations
• Bit test branch instructions
• Bit manipulation instructions, etc.
Clock (The main oscillation clock and the suboscillation clock
are only available on MB95F562H/F562K/F563H/F563K/
F564H/F564K/F582H/F582K/F583H/F583K/F584H/F584K.)
❐
Selectable main clock source
• Main oscillation clock (up to 16.25 MHz, maximum ma-
chine clock frequency: 8.125 MHz)
• External clock (up to 32.5 MHz, maximum machine clock
frequency: 16.25 MHz)
• Main CR clock (4 MHz
2%)
- The main CR clock frequency becomes 8 MHz when
the PLL multiplication rate is 2.
- The main CR clock frequency becomes 10 MHz when
the PLL multiplication rate is 2.5.
- The main CR clock frequency becomes 12 MHz when
the PLL multiplication rate is 3.
- The main CR clock frequency becomes 16 MHz when
the PLL multiplication rate is 4.
❐
Selectable subclock source
• Suboscillation clock (32.768 kHz)
• External clock (32.768 kHz)
• Sub-CR clock (Typ: 100 kHz, Min: 50 kHz, Max: 150 kHz)
Timer
❐
8/16-bit composite timer
2 channels (only one channel on
MB95F572H/F572K/F573H/F573K/F574H/F574K/F582H/
F582K/F583H/F583K/F584H/F584K)
❐
Time-base timer
1 channel
❐
Watch prescaler
1 channel
LIN-UART (only available on MB95F562H/F562K/F563H/
F563K/F564H/F564K/F582H/F582K/F583H/F583K/F584H/
F584K)
❐
Full duplex double buffer
❐
Capable of clock synchronous serial data transfer and clock
asynchronous serial data transfer
External interrupt
❐
Interrupt by edge detection (rising edge, falling edge, and
both edges can be selected)
❐
Can be used to wake up the device from different low power
consumption (standby) modes
8/10-bit A/D converter
There are four standby modes as follows:
• Stop mode
• Sleep mode
• Watch mode
• Time-base timer mode
❐
In standby mode, the device can be made to enter either
normal standby mode or deep standby mode.
❐
■
■
I/O port
❐
MB95F562H/F563H/F564H (maximum no. of I/O ports: 16)
- General-purpose I/O ports (CMOS I/O): 15
- General-purpose I/O ports (N-ch open drain): 1
- General-purpose I/O ports (CMOS I/O): 15
- General-purpose I/O ports (N-ch open drain): 2
- General-purpose I/O ports (CMOS I/O): 3
- General-purpose I/O ports (N-ch open drain): 1
- General-purpose I/O ports (CMOS I/O): 3
- General-purpose I/O ports (N-ch open drain): 2
- General-purpose I/O ports (CMOS I/O): 11
- General-purpose I/O ports (N-ch open drain): 1
- General-purpose I/O ports (CMOS I/O): 11
- General-purpose I/O ports (N-ch open drain): 2
❐
MB95F562K/F563K/F564K (maximum no. of I/O ports: 17)
❐
MB95F572H/F573H/F574H (maximum no. of I/O ports: 4)
❐
MB95F572K/F573K/F574K (maximum no. of I/O ports: 5)
❐
MB95F582H/F583H/F584H (maximum no. of I/O ports: 12)
❐
MB95F582K/F583K/F584K (maximum no. of I/O ports: 13)
■
■
On-chip debug
❐
1-wire serial control
❐
Serial writing supported (asynchronous mode)
Hardware/software watchdog timer
❐
Built-in hardware watchdog timer
❐
Built-in software watchdog timer
Power-on reset
❐
A power-on reset is generated when the power is switched
on.
Low-voltage detection reset circuit (only available on
MB95F562K/F563K/F564K/F572K/F573K/F574K/F582K/
F583K/F584K)
❐
Built-in low-voltage detector
Clock supervisor counter
❐
Built-in clock supervisor counter function
Dual operation Flash memory
❐
The program/erase operation and the read operation can be
executed in different banks (upper bank/lower bank) simul-
taneously.
Flash memory security function
❐
Protects the content of the Flash memory.
■
■
■
■
■
■
■
■
8-bit or 10-bit resolution can be selected.
■
■
Low power consumption (standby) modes
Cypress Semiconductor Corporation
Document Number: 002-04629 Rev. *E
•
198 Champion Court
•
San Jose
,
CA 95134-1709
•
408-943-2600
Revised November 21, 2017
MB95560H Series
MB95570H Series
MB95580H Series
Contents
Features............................................................................. 1
1. Product Line-up ............................................................ 3
2. Packages And Corresponding Products.................... 7
3. Differences Among Products And Notes On
Product Selection ............................................................. 8
4. Pin Assignment ............................................................ 9
5. Pin Functions (MB95560H Series, 32 pins) .............. 11
6. Pin Functions (MB95560H Series, 20 pins) .............. 13
7. Pin Functions (MB95570H Series, 8 pins) ................ 15
8. Pin Functions (MB95580H Series, 32 pins) .............. 16
9. Pin Functions (MB95580H Series, 16 pins) .............. 18
10. I/O Circuit Type ......................................................... 20
11. Handling Precautions...............................................
11.1 Precautions for Product Design.........................
11.2 Precautions for Package Mounting ...................
11.3 Precautions for Use Environment......................
21
21
23
24
19. I/O Map (MB95570H Series) ..................................... 34
20. I/O Map (MB95580H Series) ..................................... 37
21. Interrupt Source Table (MB95560H Series)............ 40
22. Interrupt Source Table (MB95570H Series)............ 41
23. Interrupt Source Table (MB95580H Series)............ 42
24. Electrical Characteristics.........................................
24.1 Absolute Maximum Ratings...............................
24.2 Recommended Operating Conditions ...............
24.3 DC Characteristics ............................................
24.4 AC Characteristics.............................................
24.5 A/D Converter....................................................
24.6 Flash Memory Program/Erase Characteristics..
43
43
45
46
49
63
67
25. Sample Characteristics............................................ 68
26. Mask Options ............................................................ 74
27. Ordering Information................................................ 75
28. Package Dimension.................................................. 77
29. Major Changes In This Edition ................................ 84
Document History Page ................................................. 87
Sales, Solutions, and Legal Information ...................... 88
Worldwide Sales and Design Support ....................... 88
Products .................................................................... 88
PSoC® Solutions ...................................................... 88
Cypress Developer Community ................................. 88
Technical Support ..................................................... 88
12. Notes On Device Handling....................................... 24
13. Pin Connection ......................................................... 25
14. Block Diagram (MB95560H Series) ......................... 26
15. Block Diagram (MB95570H Series) ......................... 27
16. Block Diagram (MB95580H Series) ......................... 28
17. CPU Core................................................................... 29
18. I/O Map (MB95560H Series) ..................................... 30
Document Number: 002-04629 Rev. *E
Page 2 of 88
MB95560H Series
MB95570H Series
MB95580H Series
1. Product Line-up
• MB95560H Series
Part number
MB95F562H
Parameter
MB95F563H
MB95F564H
MB95F562K
MB95F563K
MB95F564K
Type
Flash memory product
Clock
supervisor
It supervises the main clock oscillation.
counter
Flash memory
8 Kbyte
12 Kbyte
20 Kbyte
8 Kbyte
12 Kbyte
20 Kbyte
capacity
RAM capacity
240 bytes
496 bytes
496 bytes
240 bytes
496 bytes
496 bytes
Power-on reset
Yes
Low-voltage
No
Yes
detection reset
Reset input
Dedicated
Selected through software
• Number of basic instructions
: 136
• Instruction bit length
: 8 bits
• Instruction length
: 1 to 3 bytes
CPU functions
• Data bit length
: 1, 8 and 16 bits
• Minimum instruction execution time : 61.5 ns (machine clock frequency = 16.25 MHz)
• Interrupt processing time
: 0.6 µs (machine clock frequency = 16.25 MHz)
• I/O ports (Max) : 17
• I/O ports (Max) : 16
General-
• CMOS I/O
: 15
• CMOS I/O
: 15
purpose I/O
• N-ch open drain: 1
• N-ch open drain: 2
Time-base timer Interval time: 0.256 ms to 8.3 s (external clock frequency = 4 MHz)
• Reset generation cycle
Hardware/
software
Main oscillation clock at 10 MHz: 105 ms (Min)
watchdog timer • The sub-CR clock can be used as the source clock of the hardware watchdog timer.
Wild register
It can be used to replace 3 bytes of data.
• A wide range of communication speed can be selected by a dedicated reload timer.
• It has a full duplex double buffer.
LIN-UART
• Both clock synchronous serial data transfer and clock asynchronous serial data transfer are
enabled.
• The LIN function can be used as a LIN master or a LIN slave.
8/10-bit A/D
6 channels
converter
8-bit or 10-bit resolution can be selected.
2 channels
• The timer can be configured as an "8-bit timer
2 channels" or a "16-bit timer
1 channel".
• It has the following functions: interval timer function, PWC function, PWM function and input
8/16-bit
composite timer capture function.
• Count clock: it can be selected from internal clocks (7 types) and external clocks.
• It can output square wave.
6 channels
External
• Interrupt by edge detection (The rising edge, falling edge, or both edges can be selected.)
interrupt
• It can be used to wake up the device from the standby mode.
• 1-wire serial control
On-chip debug
• It supports serial writing (asynchronous mode).
Document Number: 002-04629 Rev. *E
Page 3 of 88
MB95560H Series
MB95570H Series
MB95580H Series
Part number
MB95F562H
Parameter
MB95F563H
MB95F564H
MB95F562K
MB95F563K
MB95F564K
Watch prescaler Eight different time intervals can be selected.
• It supports automatic programming (Embedded Algorithm), and program/erase/erase-
suspend/erase-resume commands.
• It has a flag indicating the completion of the operation of Embedded Algorithm.
Flash memory • Flash security feature for protecting the content of the Flash memory
Number of program/erase cycles
Data retention time
1000
20 years
10000
10 years
100000
5 years
Standby mode Sleep mode, stop mode, watch mode, time-base timer mode
WNP032
Package
SOJ020
STG020
• MB95570H Series
Part number
MB95F572H
Parameter
MB95F573H
MB95F574H
MB95F572K
MB95F573K
MB95F574K
Type
Flash memory product
Clock
supervisor
It supervises the main clock oscillation.
counter
Flash memory
8 Kbyte
12 Kbyte
20 Kbyte
8 Kbyte
12 Kbyte
20 Kbyte
capacity
RAM capacity
240 bytes
496 bytes
496 bytes
240 bytes
496 bytes
496 bytes
Power-on reset
Yes
Low-voltage
No
Yes
detection reset
Reset input
Dedicated
Selected through software
• Number of basic instructions
: 136
• Instruction bit length
: 8 bits
• Instruction length
: 1 to 3 bytes
CPU functions
• Data bit length
: 1, 8 and 16 bits
• Minimum instruction execution time : 61.5 ns (machine clock frequency = 16.25 MHz)
• Interrupt processing time
: 0.6 µs (machine clock frequency = 16.25 MHz)
• I/O ports (Max) : 4
• I/O ports (Max) : 5
General-
• CMOS I/O
:3
• CMOS I/O
:3
purpose I/O
• N-ch open drain: 1
• N-ch open drain: 2
Time-base timer Interval time: 0.256 ms to 8.3 s (external clock frequency = 4 MHz)
Hardware/
• Reset generation cycle
Main oscillation clock at 10 MHz: 105 ms (Min)
software
watchdog timer • The sub-CR clock can be used as the source clock of the hardware watchdog timer.
Wild register
It can be used to replace 3 bytes of data.
LIN-UART
No LIN-UART
8/10-bit A/D
2 channels
converter
8-bit or 10-bit resolution can be selected.
Document Number: 002-04629 Rev. *E
Page 4 of 88
MB95560H Series
MB95570H Series
MB95580H Series
Part number
MB95F572H
Parameter
MB95F573H
MB95F574H
MB95F572K
MB95F573K
MB95F574K
1 channel
• The timer can be configured as an "8-bit timer
2 channels" or a "16-bit timer
1 channel".
• It has the following functions: interval timer function, PWC function, PWM function and input
8/16-bit
composite timer capture function.
• Count clock: it can be selected from internal clocks (7 types) and external clocks.
• It can output square wave.
2 channels
External
• Interrupt by edge detection (The rising edge, falling edge, or both edges can be selected.)
interrupt
• It can be used to wake up the device from the standby mode.
• 1-wire serial control
On-chip debug
• It supports serial writing (asynchronous mode).
Watch prescaler Eight different time intervals can be selected.
• It supports automatic programming (Embedded Algorithm), and program/erase/erase-
suspend/erase-resume commands.
• It has a flag indicating the completion of the operation of Embedded Algorithm.
Flash memory • Flash security feature for protecting the content of the Flash memory
Number of program/erase cycles
Data retention time
1000
20 years
10000
10 years
100000
5 years
Standby mode Sleep mode, stop mode, watch mode, time-base timer mode
PDA008
Package
SOD008
• MB95580H Series
Part number
MB95F582H
Parameter
MB95F583H
MB95F584H
MB95F582K
MB95F583K
MB95F584K
Type
Flash memory product
Clock
supervisor
It supervises the main clock oscillation.
counter
Flash memory
8 Kbyte
12 Kbyte
20 Kbyte
8 Kbyte
12 Kbyte
20 Kbyte
capacity
RAM capacity
240 bytes
496 bytes
496 bytes
240 bytes
496 bytes
496 bytes
Power-on reset
Yes
Low-voltage
No
Yes
detection reset
Reset input
Dedicated
Selected through software
• Number of basic instructions
: 136
• Instruction bit length
: 8 bits
• Instruction length
: 1 to 3 bytes
CPU functions
• Data bit length
: 1, 8 and 16 bits
• Minimum instruction execution time : 61.5 ns (machine clock frequency = 16.25 MHz)
• Interrupt processing time
: 0.6 µs (machine clock frequency = 16.25 MHz)
• I/O ports (Max) : 12
• I/O ports (Max) : 13
General-
• CMOS I/O
: 11
• CMOS I/O
: 11
purpose I/O
• N-ch open drain: 2
• N-ch open drain: 1
Document Number: 002-04629 Rev. *E
Page 5 of 88
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