Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Operating Temperature Range ......................... -40°C to +125°C
Junction Temperature ......................................................+150°C
Storage Temperature Range ............................ -65°C to +150°C
Lead Temperature (soldering, 10s) ................................. +300°C
Soldering Temperature (reflow) .......................................+240°C
Package Information
PACKAGE TYPE: 8 TDFN
Package Code
Outline Number
Land Pattern Number
THERMAL RESISTANCE, FOUR-LAYER BOARD
Junction to Ambient (θ
JA
)
Junction to Case (θ
JC
)
PACKAGE TYPE: 8 SO
Package Code
Outline Number
Land Pattern Number
THERMAL RESISTANCE, FOUR-LAYER BOARD
Junction to Ambient (θ
JA
)
Junction to Case (θ
JC
)
PACKAGE TYPE: 8 µMAX
Package Code
Outline Number
Land Pattern Number
THERMAL RESISTANCE, FOUR-LAYER BOARD
Junction to Ambient (θ
JA
)
Junction to Case (θ
JC
)
77.6°C/W
5°C/W
U8E+2
21-0107
90-0145
136°C/W
38°C/W
S8+2
21-0041
90-0096
42°C/W
8°C/W
T833+2
21-0137
90-0059
For the latest package outline information and land patterns (footprints), go to
www.maximintegrated.com/packages.
Note that a “+”,
“#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board.
For detailed information on package thermal considerations, refer to
www.maximintegrated.com/thermal-tutorial.
www.maximintegrated.com
Maxim Integrated
│
2
MAX17600–MAX17605
4A Sink/Source Current,
12ns, Dual MOSFET Drivers
Electrical Characteristics
(V
DD
= 12V, C
L
= 0F, at T
A
= -40°C to +125°C, unless otherwise noted. Typical values are specified at T
A
= +25°C. Parameters
specified at V
DD
= 4V apply to the TTL versions only.) (Note 1)
PARAMETER
POWER SUPPLY (V
DD
)
V
DD
Operating Range
V
DD
Undervoltage Lockout
V
DD
UVLO Hysteresis
V
DD
UVLO to OUT_ Delay
IDD_Q
V
DD
Supply Current
IDD_SW
V
DD
rising
Not switching, V
DD
= 14V (Note 2)
V
DD
= 4.5V, C
L
= 1nF, both channels
switching at 1MHz
V
DD
= 14V, C
L
= 10nF (Note 2)
V
DD
= 14V, I
OUT_
= 100mA
V
DD
= 4V, I
OUT_
= 100mA
V
DD
= 14V, C
L
= 10nF (Note 2)
V
DD
= 14V, I
OUT_
= -100mA
V
DD
= 4V, I
OUT_
= -100mA
MAX17600/1/2
MAX17603/4/5
MAX17600/1/2
MAX17603/4/5
MAX17600/1/2
MAX17603/4/5
V
INA
= V
INB
= 0V or V
DD
(MAX17600/1/2)
V
INA
= V
INB
= 0V or V
DD
(MAX17603/4/5)
(Note 2)
-1
0.34
0.9
+0.02
10
10
+1
2.1
4.25
0.8
2.0
V
DD
UVLO
TTL versions
HNM versions
V
DD
rising
4
6
3
3.5
200
120
1
12
2
18
mA
14
14
3.85
V
V
mV
µs
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DRIVER OUTPUT (SOURCE) (OUTA, OUTB)
Peak Output Current (Sourcing)
Driver Output Resistance Pulling Up
(Note 3)
I
PK-P
R
ON-P
4
0.88
0.91
4
0.5
0.52
0.95
1
1.85
1.95
A
Ω
DRIVER OUTPUT (SINK) (OUTA, OUTB)
Peak Output Current (Sinking)
Driver Output Resistance Pulling
Down (Note 3)
LOGIC INPUT (INA, INB)
V
IN_
Logic-High Input Voltage
V
IN_
Logic-Low Input Voltage
Logic Input Hysteresis
Logic Input Leakage Current
Logic Input Bias Current
Logic Input Capacitance
V
IH
V
IL
V
HYS
I
LKG
I
BIAS
C
IN
V
V
V
µA
µA
pF
I
PK-N
R
ON-N
A
Ω
www.maximintegrated.com
Maxim Integrated
│
3
MAX17600–MAX17605
4A Sink/Source Current,
12ns, Dual MOSFET Drivers
Electrical Characteristics (continued)
(V
DD
= 12V, C
L
= 0F, at T
A
= -40°C to +125°C, unless otherwise noted. Typical values are specified at T
A
= +25°C. Parameters
specified at V
DD
= 4V apply to the TTL versions only.) (Note 1)
PARAMETER
ENABLE (ENA, ENB)
V
EN_H
High Level Voltage
V
EN_L
Low Level Voltage
Enable Hysteresis
Enable Pullup Resistor to V
DD
Propagation Delay from EN_ to OUT_
(Note 2)
EN_
HYS
R
pu
t
pd
MAX17600/1/2
MAX17603/4/5
MAX17600/1/2
MAX17603/4/5
MAX17600/1/2
MAX17603/4/5
MAX17600/1/2
MAX17603/4/5
EN_ rising
EN_ falling
C
L
= 1nF
OUT_ Rise Time
t
R
C
L
= 4.7nF
C
L
= 10nF
C
L
= 1nF
OUT_ Fall Time
Turn-On Delay Time
Turn-Off Delay Time
t
F
t
D-ON
t
D-OFF
C
L
= 4.7nF
C
L
= 10nF
C
L
= 1nF
C
L
= 1nF
C
L
= 1nF
OUT_ Rise Time
t
R
C
L
= 4.7nF
C
L
= 10nF
C
L
= 1nF
OUT_ Fall Time
Turn-On Delay Time
Turn-Off Delay Time
Matching Propagation Delays
Between Channel A and Channel B
t
F
t
D-ON
t
D-OFF
C
L
= 4.7nF
C
L
= 10nF
C
L
= 1nF
C
L
= 1nF
50
100
0.34
0.9
100
200
7
7
6
20
40
6
16
25
12
12
5
15
28
5
10
18
12
12
ns
ns
ns
ns
ns
ns
ns
ns
200
400
2.1
4.25
0.8
2.0
V
V
V
kΩ
ns
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
SWITCHING CHARACTERISTICS (V
DD
= 14V) (Note 2)
SWITCHING CHARACTERISTICS (V
DD
= 4.5V) (Note 2)
MATCHING CHARACTERISTICS (Note 2)
V
DD
= 14V, C
L
= 10nF
8
ns
Note 1:
All devices are production tested at T
A
= +25°C. Limits over temperature are guaranteed by design.
Note 2:
Design guaranteed by bench characterization. Limits are not production tested.
1 Introduction
In the mid-1960s, American scientist Maas conducted extensive experimental research on the charging process of open-cell batteries and proposed an acceptable charging curve for ...[详细]
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