CY62167DV30 MoBL
®
16-Mbit (1 M × 16) Static RAM
16-Mbit (1 M × 16) Static RAM
Features
■
■
■
■
■
■
■
■
Thin small outline package (TSOP-I) configurable as
1 M × 16 or as 2 M × 8 SRAM
Wide voltage range: 2.2 V–3.6 V
Ultra-low active power:
Typical active current: 2 mA at f = 1 MHz
Ultra-low standby power
Easy memory expansion with CE
1
, CE
2
and OE features
Automatic power-down when deselected
Complementary metal oxide semiconductor (CMOS) for
optimum speed / power
Available in Pb-free and non Pb-free 48-ball very fine-pitch ball
grid array (VFBGA) and 48-pin TSOP I package
automatic power-down feature that significantly reduces power
consumption by 99% when addresses are not toggling. The
device can also be put into standby mode when deselected (CE
1
HIGH or CE
2
LOW or both BHE and BLE are HIGH). The
input/output pins (I/O
0
through I/O
15
) are placed in a
high-impedance state when: deselected (CE
1
HIGH or CE
2
LOW), outputs are disabled (OE HIGH), both Byte High Enable
and Byte Low Enable are disabled (BHE, BLE HIGH), or during
a Write operation (CE
1
LOW, CE
2
HIGH and WE LOW).
Writing to the device is accomplished by taking Chip Enables
(CE
1
LOW and CE
2
HIGH) and Write Enable (WE) input LOW. If
Byte Low Enable (BLE) is LOW, then data from I/O pins (I/O
0
through I/O
7
), is written into the location specified on the address
pins (A
0
through A
19
). If Byte High Enable (BHE) is LOW, then
data from I/O pins (I/O
8
through I/O
15
) is written into the location
specified on the address pins (A
0
through A
19
).
Reading from the device is accomplished by taking Chip Enables
(CE
1
LOW and CE
2
HIGH) and Output Enable (OE) LOW while
forcing the Write Enable (WE) HIGH. If Byte Low Enable (BLE)
is LOW, then data from the memory location specified by the
address pins appear on I/O
0
to I/O
7
. If Byte High Enable (BHE)
is LOW, then data from memory appear on I/O
8
to I/O
15
. See the
truth table at the back of this data sheet for a complete
description of Read and Write modes.
For a complete list of related documentation,
click here.
Functional Description
The CY62167DV30 is a high-performance CMOS static RAM
organized as 1M words by 16-bits. This device features
advanced circuit design to provide ultra-low active current. This
is ideal for providing More Battery Life (MoBL
) in portable
applications such as cellular telephones. The device also has an
Logic Block Diagram
DATA IN DRIVERS
A
10
A
9
A
8
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
ROW DECODER
1M × 16 / 2M x 8
RAM Array
SENSE AMPS
I/O
0
–I/O
7
I/O
8
–I/O
15
COLUMN DECODER
BYTE
BHE
WE
OE
BLE
CE
2
CE
1
Power-Down
Circuit
A
11
A
12
A
13
A
14
A
15
A
16
A
17
A
18
A
19
BHE
BLE
CE
2
CE
1
Cypress Semiconductor Corporation
Document Number: 38-05328 Rev. *M
•
198 Champion Court
•
San Jose
,
CA 95134-1709
•
408-943-2600
Revised November 19, 2014
CY62167DV30 MoBL
®
Contents
Product Portfolio .............................................................. 3
Pin Configurations ........................................................... 3
Maximum Ratings ............................................................. 4
Operating Range ............................................................... 4
Electrical Characteristics ................................................. 4
Capacitance ...................................................................... 5
Thermal Resistance .......................................................... 5
AC Test Loads and Waveforms ....................................... 5
Data Retention Characteristics ....................................... 6
Data Retention Waveform ................................................ 6
Switching Characteristics ................................................ 7
Switching Waveforms ...................................................... 8
Truth Table ...................................................................... 12
Ordering Information ...................................................... 13
Ordering Code Definitions ......................................... 13
Package Diagrams .......................................................... 14
Acronyms ........................................................................ 16
Document Conventions ................................................. 16
Units of Measure ....................................................... 16
Document History Page ................................................. 17
Sales, Solutions, and Legal Information ...................... 18
Worldwide Sales and Design Support ....................... 18
Products .................................................................... 18
PSoC® Solutions ...................................................... 18
Cypress Developer Community ................................. 18
Technical Support ..................................................... 18
Document Number: 38-05328 Rev. *M
Page 2 of 18
CY62167DV30 MoBL
®
Product Portfolio
Power Dissipation
Product
Min
CY62167DV30LL
2.2
V
CC
Range (V)
Typ
[1]
3.0
Max
3.6
55
70
Speed
(ns)
2
Operating I
CC
(mA)
f = 1 MHz
Typ
[1]
Max
4
15
12
f = f
Max
Typ
[1]
Max
30
25
Standby I
SB2
(A)
Typ
[1]
2.5
Max
22
Pin Configurations
Figure 1. 48-ball VFBGA pinout (Top View)
[2, 3]
1
BLE
I/O
8
I/O
9
V
SS
V
CC
I/O
14
I/O
15
A
18
2
OE
BHE
I/O
10
I/O
11
3
A
0
A
3
A
5
A
17
4
A
1
A
4
A
6
A
7
A
16
A
15
A
13
A
10
5
A
2
CE
1
I/O
1
I/O
3
I/O
4
I/O
5
WE
A
11
6
CE
2
I/O
0
I/O
2
Vcc
Vss
I/O
6
I/O
7
DNU
A
B
C
D
E
F
G
H
I/O
12
DNU
I/O
13
A
19
A
8
A
14
A
12
A
9
Figure 2. 48-pin TSOP I pinout (Top View)
[4]
A15
A14
A13
A12
A11
A10
A9
A8
A19
NC
WE
CE2
DNU
BHE
BLE
A18
A17
A7
A6
A5
A4
A3
A2
A1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
A16
BYTE
Vss
I/O15/A20
I/O7
I/O14
I/O6
I/O13
I/O5
I/O12
I/O4
Vcc
I/O11
I/O3
I/O10
I/O2
I/O9
I/O1
I/O8
I/O0
OE
Vss
CE1
A0
Notes
1. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V
CC
= V
CC(typ.)
, T
A
= 25 °C.
2. NC pins are not connected on the die.
3. DNU pins have to be left floating.
4. The BYTE pin in the 48-TSOP I package has to be tied to V
CC
to use the device as a 1M X 16 SRAM. The 48-TSOP I package can also be used as a 2 M × 8 SRAM
by tying the BYTE signal to V
SS
. In the 2 M × 8 configuration, Pin 45 is A20, while BHE, BLE and I/O8 to I/O14 pins are not used (DNU).
Document Number: 38-05328 Rev. *M
Page 3 of 18
CY62167DV30 MoBL
®
Maximum Ratings
Exceeding maximum ratings may shorten the useful life of the
device. User guidelines are not tested.
Storage temperature ................................ –65 °C to +150 °C
Ambient temperature with
power applied .......................................... –55 °C to +125 °C
Supply voltage to ground potential ..... –0.2 V to V
CC
+ 0.3 V
DC voltage applied to outputs
in High-Z state
[5, 6]
............................. –0.2 V to V
CC
+ 0.3 V
DC input voltage
[5, 6]
.......................... –0.2 V to V
CC
+ 0.3 V
Output current into outputs (LOW) ............................. 20 mA
Static discharge voltage
(per MIL-STD-883, Method 3015) ......................... > 2001 V
Latch-up current .................................................... > 200 mA
Operating Range
Device
Range
Ambient
Temperature
V
CC
[7]
2.20 V to
3.60 V
CY62167DV30LL Industrial –40 °C to +85 °C
Electrical Characteristics
Over the Operating Range
Parameter
V
OH
V
OL
V
IH
V
IL
I
IX
I
OZ
I
CC
Description
Output HIGH voltage
Output LOW voltage
Input HIGH voltage
Input LOW voltage
Input leakage current
Test Conditions
I
OH
= –0.1 mA V
CC
= 2.20 V
I
OH
= –1.0 mA V
CC
= 2.70 V
I
OL
= 0.1 mA
I
OL
= 2.1 mA
V
CC
= 2.20 V
V
CC
= 2.70 V
1.8
2.2
–0.3
–1
–1
–
–
–
–
15
2
–
2.5
0.6
0.8
+1
+1
30
4
22
–
–1
–1
–
–
–
12
2
2.5
–
V
CC
+ 0.3
1.8
2.2
–0.3
–
0.6
0.8
+1
+1
25
4
22
A
A
A
mA
V
–
V
CC
+ 0.3
V
CY62167DV30-55
Min
2.0
2.4
–
–
0.4
Typ
[8]
–
Max
–
CY62167DV30-70
Min
2.0
2.4
–
0.4
V
Typ
[8]
–
Max
–
Unit
V
V
CC
= 2.2 V to 2.7 V
V
CC
= 2.7 V to 3.6 V
V
CC
= 2.2 V to 2.7 V
V
CC
= 2.7 V to 3.6 V
GND
V
I
V
CC
Output leakage current GND
V
O
V
CC
, output
disabled
V
CC
operating supply
current
V
CC
= V
CC(max)
f = f
Max
= 1/t
RC
I
OUT
= 0 mA
f = 1 MHz
CMOS levels
I
SB1
Automatic power-down CE
1
V
CC
0.2
V or CE
2
0.2 V,
current – CMOS inputs V
IN
V
CC
– 0.2 V, V
IN
0.2 V,
f = f
Max
(address and data only),
f = 0 (OE, WE), V
CC
= 3.60 V
Automatic power-down CE
1
V
CC
– 0.2 V or
current – CMOS Inputs CE
2
0.2 V
V
IN
V
CC
– 0.2 V or V
IN
0.2V,
f = 0, V
CC
= 3.60 V
I
SB2
–
2.5
22
–
2.5
22
A
Notes
5. V
IL(min.)
= –2.0 V for pulse durations less than 20 ns.
6. V
IH(max)
= V
CC
+ 0.75 V for pulse durations less than 20 ns.
7. Full Device AC operation requires linear V
CC
ramp from 0 to V
CC(min.)
and V
CC
must be stable at V
CC(min)
for 500s.
8. Typical values are included for reference only and are not guaranteed or tested. Typical values are measured at V
CC
= V
CC(typ)
, T
A
= 25 °C.
Document Number: 38-05328 Rev. *M
Page 4 of 18
CY62167DV30 MoBL
®
Capacitance
Parameter
[10]
C
IN
C
OUT
Description
Input capacitance
Output capacitance
Test Conditions
T
A
= 25 °C, f = 1 MHz, V
CC
= V
CC(typ)
Max
8
10
Unit
pF
pF
Thermal Resistance
Parameter
[10]
JA
JC
Description
Thermal resistance
(junction to ambient)
Thermal resistance
(junction to case)
Test Conditions
Still air, soldered on a 3 × 4.5 inch, 2-layer
printed circuit board
VFBGA
55
16
TSOP I
60
4.3
Unit
C/W
C/W
AC Test Loads and Waveforms
Figure 3. AC Test Loads and Waveforms
V
CC
OUTPUT
50 pF
[12]
INCLUDING
JIG AND
SCOPE
Equivalent to:
THEVENIN EQUIVALENT
R
TH
OUTPUT
V
R1
V
CC
R2
GND
Rise Time = 1 V/ns
10%
ALL INPUT PULSES
90%
90%
10%
Fall Time = 1 V/ns
Parameters
R1
R2
R
TH
V
TH
2.5 V
16667
15385
8000
1.20
3.0 V
1103
1554
645
1.75
Unit
V
Document Number: 38-05328 Rev. *M
Page 5 of 18
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