Femtoclocks™ Crystal-to-3.3V LVPECL
Frequency Synthesizer W/Integrated
Fanout Buffer
Data Sheet
843246I
G
ENERAL
D
ESCRIPTION
The 843246I is a Crystal-to-3.3V LVPECL Clock Synthesizer/Fanout
Buffer designed for Fibre Channel and Gigabit Ethernet applications
and is a member of the family of High Performance Clock Solutions
from IDT. The output frequency can be set using the frequency select
pins and a 25MHz crystal for Ethernet frequencies, or a 26.5625MHz
crystal for a Fibre Channel. The low phase noise characteristics of
the 843246I make it an ideal clock for these demanding applications.
F
EATURES
•
Six LVPECL outputs
•
Crystal oscillator interface
•
VCO range: 490MHz to 680MHz
•
Crystal input frequency range: 25MHz to 33.333MHz
•
RMS phase jitter at 125MHz, using a 25MHz crystal
(1.875MHz to 20MHz): 0.41ps (typical)
•
Full 3.3V or 3.3V core, 2.5V output supply mode
Core/Output
3.3V/3.3V
3.3V/2.5V
S
ELECT
F
UNCTION
T
ABLE
Inputs
FB_SEL
0
0
0
0
1
1
1
1
N_SEL1
0
0
1
1
0
0
1
1
N_SEL0
0
1
0
1
0
1
0
1
M Divide
20
20
20
20
24
24
24
24
Function
N Divide
2
4
5
8
3
4
6
12
M/N
10
5
4
2.5
8
6
4
2
•
-40°C to 85°C ambient operating temperature
•
Available in lead-free (RoHS 6) package
B
LOCK
D
IAGRAM
P
IN
A
SSIGNMENT
843246I
24-Lead TSSOP, E-Pad
4.40mm x 7.8mm x 0.9mm
body package
G Package
Top View
©2015 Integrated Device Technology, Inc
1
December 8, 2015
843246I Data Sheet
T
ABLE
1. P
IN
D
ESCRIPTIONS
Number
1, 2
3, 4
5, 6
7, 8
9
10
11
12
13,
14
15,
18
16, 17
19, 20
21, 22
23, 24
Name
V
CCO
nQ2, Q2
nQ1, Q1
nQ0, Q0
PLL_BYPASS
V
CCA
V
CC
FB_SEL
XTAL_IN, XTAL_
OUT
N_SEL0
N_SEL1
V
EE
nQ5, Q5
nQ4, Q4
nQ3, Q3
Output
Output
Output
Power
Output
Output
Output
Input
Power
Power
Input
Input
Input
Pullup
Pullup
Type
Description
Output supply pins.
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
Selects between the PLL and crystal inputs as the input to the dividers.
When LOW, selects PLL. When HIGH, selects XTAL_IN, XTAL_OUT.
LVCMOS / LVTTL interface levels.
Analog supply pin.
Core supply pin.
Pulldown Feedback frequency select pin. LVCMOS/LVTTL interface levels.
Crystal oscillator interface. XTAL_IN is the input.
XTAL_OUT is the output.
Output frequency select pins. LVCMOS/LVTTL interface levels.
Negative supply pins.
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
Differential output pair. LVPECL interface levels.
NOTE:
Pullup
and
Pulldown
refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
T
ABLE
2. P
IN
C
HARACTERISTICS
Symbol
C
IN
R
PULLUP
R
PULLDOWN
Parameter
Input Capacitance
Input Pullup Resistor
Input Pulldown Resistor
Test Conditions
Minimum
Typical
4
51
51
Maximum
Units
pF
kΩ
kΩ
©2015 Integrated Device Technology, Inc
2
December 8, 2015
843246I Data Sheet
T
ABLE
3. T
YPICAL
A
PPLICATION
F
REQUENCY
F
UNCTION
T
ABLE
Inputs
XTAL (MHz)
25
25
25
25
25
25
25
25
26.5625
26.5625
26.5625
26.5625
26.5625
30
30
30
30
31.25
31.25
31.25
31.25
33.3333
33.3333
33.3333
33.3333
FB_SEL
0
0
0
0
1
1
1
1
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
N_SEL1
0
0
1
1
0
0
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
N_SEL0
0
1
0
1
0
1
0
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
M
20
20
20
20
24
24
24
24
20
24
24
24
24
20
20
20
20
20
20
20
20
20
20
20
20
500
500
500
500
600
600
600
600
531.25
637.5
637.5
637.5
637.5
600
600
600
600
625
625
625
625
666.6667
666.6667
666.6667
666.6667
Function
VCO (MHz)
N
2
4
5
8
3
4
6
12
5
3
4
6
12
2
4
5
8
2
4
5
8
2
4
5
8
Output (MHz)
250
125
100
62.5
200
150
100
50
106.25
212.5
159.375
106.25
53.125
300
150
120
75
312.5
156.25
125
78.125
333.3333
166.6667
133.3333
83.3333
©2015 Integrated Device Technology, Inc
3
December 8, 2015
843246I Data Sheet
A
BSOLUTE
M
AXIMUM
R
ATINGS
Supply Voltage, V
CC
Inputs, V
I
Outputs, I
O
Continuous Current
Surge Current
Package Thermal Impedance,
θ
JA
Storage Temperature, T
STG
4.6V
-0.5V to V
CC
+ 0.5V
50mA
100mA
37°C/W (0 mps)
-65°C to 150°C
N OT E : S t r e s s e s b eyo n d t h o s e l i s t e d u n d e r A b s o l u t e
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Functional
operation of product at these conditions or any conditions beyond
those listed in the
DC Characteristics
or
AC Characteristics
is not
implied. Exposure to absolute maximum rating conditions for ex-
tended periods may affect product reliability.
T
ABLE
4A. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
CC
= V
CCO
= 3.3V±5%, V
EE
= 0V, T
A
= -40°C
TO
85°C
Symbol
V
CC
V
CCA
V
CCO
I
EE
I
CCA
Parameter
Core Supply Voltage
Analog Supply Voltage
Output Supply Voltage
Power Supply Current
Analog Supply Current
Test Conditions
Minimum
3.135
V
CC
– 0.10
3.135
Typical
3.3
3.3
3.3
Maximum
3.465
V
CC
3.465
180
10
Units
V
V
V
mA
mA
T
ABLE
4B. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
CC
= 3.3V±5%, V
CCO
= 2.5V±5%, V
EE
= 0V, T
A
= -40°C
TO
85°C
Symbol
V
CC
V
CCA
V
CCO
I
EE
I
CCA
Parameter
Core Supply Voltage
Analog Supply Voltage
Output Supply Voltage
Power Supply Current
Analog Supply Current
Test Conditions
Minimum
3.135
V
CC
– 0.10
2.375
Typical
3.3
3.3
2.5
Maximum
3.465
V
CC
2.625
180
10
Units
V
V
V
mA
mA
T
ABLE
4C. LVCMOS / LVTTL DC C
HARACTERISTICS
,
V
CC
= 3.3V±5%, V
CCO
= 3.3V±5%
OR
2.5V±5%, V
EE
= 0V, T
A
= -40°C
TO
85°C
Symbol
V
IH
V
IL
I
IH
Parameter
Input High Voltage
Input Low Voltage
FB_SEL
Input High Current
PLL_BYPASS,
N_SEL0, N_SEL1
FB_SEL
I
IL
Input Low Current
PLL_BYPASS,
N_SEL0, N_SEL1
V
CC
= V
IN
= 3.465V
V
CC
= V
IN
= 3.465V
V
CC
= 3.465V, V
IN
= 0V
V
CC
= 3.465V, V
IN
= 0V
-5
-150
Test Conditions
Minimum
2
-0.3
Typical
Maximum
V
CC
+ 0.3
0.8
150
5
Units
V
V
µA
µA
µA
µA
©2015 Integrated Device Technology, Inc
4
December 8, 2015
843246I Data Sheet
T
ABLE
4D. LVPECL DC C
HARACTERISTICS
,
V
CC
= 3.3V±5%, V
CCO
= 3.3V±5%
OR
2.5V±5%, V
EE
= 0V, T
A
= -40°C
TO
85°C
Symbol
V
OH
V
OL
V
SWING
Parameter
Output High Voltage; NOTE 1
Output Low Voltage; NOTE 1
Peak-to-Peak Output Voltage Swing
Test Conditions
Minimum
V
CCO
- 1.4
V
CCO
- 2.0
0.6
Typical
Maximum
V
CCO
- 0.9
V
CCO
- 1.7
1.0
Units
V
V
V
NOTE 1: Outputs terminated with 50Ω to V
CCO
- 2V.
T
ABLE
5. C
RYSTAL
C
HARACTERISTICS
Parameter
Mode of Oscillation
Frequency
Equivalent Series Resistance (ESR)
Shunt Capacitance
NOTE: Characterized using an 18pF parallel resonant crystal.
25
Test Conditions
Minimum
Typical Maximum
33.333
50
7
Units
MHz
Ω
pF
Fundamental
T
ABLE
6A. AC C
HARACTERISTICS
,
V
CC
= V
CCO
= 3.3V±5%, V
EE
= 0V, T
A
= -40°C
TO
85°C
Symbol
F
OUT
tjit(Ø)
tsk(o)
t
R
/ t
F
odc
Parameter
Output Frequency
RMS Phase Jitter (Random)
Output Skew; NOTE 1, 2
Output Rise/Fall Time
Output Duty Cycle
20% to 80%
200
45
125MHz, Integration Range:
1.875MHz - 20MHz
312.5MHz, Integration Range:
1.875MHz - 20MHz
Test Conditions
Minimum
40.833
0.41
0.47
40
700
55
Typical
Maximum
340
Units
MHz
ps
ps
ps
ps
%
See Parameter Measurement Information section.
NOTE 1: Defined as skew between outputs at the same supply voltage and with equal load conditions.
Measured at the output differential crossing points.
NOTE 2: This parameter is defined in accordance with JEDEC Standard 65.
T
ABLE
6B. AC C
HARACTERISTICS
,
V
CC
= 3.3V±5%, V
CCO
= 2.5V±5%, V
EE
= 0V, T
A
= -40°C
TO
85°C
Symbol
F
OUT
tjit(Ø)
tsk(o)
t
R
/ t
F
odc
Parameter
Output Frequency
RMS Phase Jitter (Random)
Output Skew; NOTE 1, 2
Output Rise/Fall Time
Output Duty Cycle
20% to 80%
200
45
125MHz, Integration Range:
1.875MHz - 20MHz
312.5MHz, Integration Range:
1.875MHz - 20MHz
Test Conditions
Minimum
40.833
0.44
0.46
40
700
55
Typical
Maximum
340
Units
MHz
ps
ps
ps
ps
%
See Parameter Measurement Information section.
NOTE 1: Defined as skew between outputs at the same supply voltage and with equal load conditions.
Measured at the output differential crossing points.
NOTE 2: This parameter is defined in accordance with JEDEC Standard 65.
©2015 Integrated Device Technology, Inc
5
December 8, 2015
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