LNK353/354
®
LinkSwitch-HF
Family
Product Highlights
Features Optimized for Lowest System Cost
• Fully integrated auto-restart for short-circuit and open
loop protection
• Self-biased supply – saves transformer auxiliary winding
and associated bias supply components
• Tight tolerances and negligible temperature variation on
key parameters eases design and lowers cost
• High maximum switching frequency allows very low
flux density transformer designs, practically eliminating
audible noise
• Frequency jittering greatly reduces EMI
• Packages with large creepage to high voltage pin
•
Lowest component count switcher solution
Much Better Performance over Linear/RCC
• Lower system cost than RCC, discrete PWM and other
integrated solutions
• Universal input range allows worldwide operation
• Simple ON/OFF control – no loop compensation needed
• No bias winding – simpler, lower cost transformer
• High frequency switching – smaller and lower cost
transformer
• Very low component count – higher reliability and single
side printed circuit board
• High bandwidth provides fast turn on with no overshoot
and excellent transient load response
• Current limit operation rejects line frequency ripple
• Built-in current limit and hysteretic thermal shutdown
protection
EcoSmart
– Extremely Energy Efficient
• No-load consumption <300 mW without bias winding at
265 VAC input
• Meets California Energy Commission (CEC), Energy
Star, and EU requirements
Applications
• Chargers for cell/cordless phones, PDAs, digital cameras,
MP3/portable audio devices, shavers etc.
• Standby and auxiliary supplies
®
Enhanced, Energy Efficient, Low Power
Off-Line Switcher IC
+
DC
Output
+
Wide Range
HV DC Input
LinkSwitch-HF
D
FB
BP
S
PI-3855-022704
Figure 1. Typical Standby Application.
OUTPUT POWER TABLE
PRODUCT
(3)
230 VAC ±15%
85-265 VAC
Adapter
(1)
3W
3.5 W
Open
Open
(1)
(2)
Adapter
Frame
Frame
(2)
4W
5W
2.5 W
(4)
3 W
(4)
3W
4.5 W
LNK353 P or G
LNK354 P or G
Table 1.
Notes:
1.
Typical continuous power in a non-ventilated
enclosed adapter measured at 50
°C
ambient.
2.
Maximum practical
continuous power in an open frame design with adequate heat
sinking, measured at 50
°C
ambient.
3.
Packages: P: DIP-8B,
G: SMD-8B. For lead-free package options, see Part Ordering
Information.
4.
For designs without a Y capacitor, the available power
may be lower (see Key Applications Considerations).
Description
LinkSwitch-HF
integrates a 700 V power MOSFET, oscillator,
simple ON/OFF control scheme, a high voltage switched current
source, frequency jittering, cycle-by-cycle current limit, and
thermal shutdown circuitry onto a monolithic IC. The start-up
and operating power are derived directly from the DRAIN pin,
eliminating the need for a bias winding and associated circuitry.
The 200 kHz maximum switching frequency allows very
low flux transformer designs, practically eliminating audible
noise with the simple ON/OFF control scheme using standard
varnished transformer construction. Efficient operation at this
high switching frequency is achieved due to the optimized
switching characteristics and small capacitances of the integrated
power MOSFET. The fully integrated auto-restart circuit safely
limits output power during fault conditions such as output short
circuit or open loop, reducing component count and secondary
feedback circuitry cost. The internal oscillator frequency is
jittered to significantly reduce both the quasi-peak and average
EMI, minimizing filtering cost.
February 2005
LNK353/354
BYPASS
(BP)
DRAIN
(D)
REGULATOR
5.8 V
FAULT
PRESENT
AUTO-
RESTART
COUNTER
CLOCK
RESET
6.3 V
5.8 V
4.85 V
BYPASS PIN
UNDER-VOLTAGE
+
-
CURRENT LIMIT
COMPARATOR
+
-
VI
LIMIT
JITTER
CLOCK
DC
MAX
OSCILLATOR
FEEDBACK
(FB)
1.65 V -V
T
S
R
Q
Q
LEADING
EDGE
BLANKING
THERMAL
SHUTDOWN
SOURCE
(S)
PI-2367-021105
Figure 2. Functional Block Diagram.
Pin Functional Description
DRAIN (D) Pin:
Power MOSFET drain connection. Provides internal operating
current for both start-up and steady-state operation.
BYPASS (BP) Pin:
Connection point for a 0.1
µF
external bypass capacitor for the
internally generated 5.8 V supply.
FEEDBACK (FB) Pin:
During normal operation, switching of the power MOSFET is
controlled by this pin. MOSFET switching is terminated when
a current greater than 49
µA
is delivered into this pin.
SOURCE (S) Pin:
This pin is the power MOSFET source connection. It is also the
ground reference for the BYPASS and FEEDBACK pins.
P Package (DIP-8B)
G Package (SMD-8B)
S
S
BP
FB
1
2
3
4
8
7
S
S
5
D
PI-3491-111903
Figure 3. Pin Configuration.
2
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2/05
LNK353/354
LinkSwitch-HF
Functional
Description
LinkSwitch-HF
combines a high voltage power MOSFET
switch with a power supply controller in one device. Unlike
conventional PWM (pulse width modulator) controllers,
LinkSwitch-HF
uses a simple ON/OFF control to regulate the
output voltage. The
LinkSwitch-HF
controller consists of an
oscillator, feedback (sense and logic) circuit, 5.8 V regulator,
BYPASS pin under-voltage circuit, over-temperature protection,
frequency jittering, current limit circuit, leading edge blanking
and a 700 V power MOSFET. The
LinkSwitch-HF
incorporates
additional circuitry for auto-restart.
Oscillator
The typical oscillator frequency is internally set to an average
of 200 kHz. Two signals are generated from the oscillator: the
maximum duty cycle signal (DC
MAX
) and the clock signal that
indicates the beginning of each cycle.
The
LinkSwitch-HF
oscillator incorporates circuitry that
introduces a small amount of frequency jitter, typically 16 kHz
peak-to-peak, to minimize EMI emission. The modulation rate of
the frequency jitter is set to 1.5 kHz to optimize EMI reduction
for both average and quasi-peak emissions. The frequency
jitter should be measured with the oscilloscope triggered at
the falling edge of the DRAIN waveform. The waveform in
Figure 4 illustrates the frequency jitter of the
LinkSwitch-HF.
Feedback Input Circuit
The feedback input circuit at the FB pin consists of a low
impedance source follower output set at 1.65 V. When the current
delivered into this pin exceeds 49
µA,
a low logic level (disable)
is generated at the output of the feedback circuit. This output
is sampled at the beginning of each cycle on the rising edge of
the clock signal. If high, the power MOSFET is turned on for
that cycle (enabled), otherwise the power MOSFET remains off
(disabled). Since the sampling is done only at the beginning of
each cycle, subsequent changes in the FB pin voltage or current
during the remainder of the cycle are ignored.
5.8 V Regulator and 6.3 V Shunt Voltage Clamp
The 5.8 V regulator charges the bypass capacitor connected
to the BYPASS pin to 5.8 V by drawing a current from the
voltage on the DRAIN, whenever the MOSFET is off. The
BYPASS pin is the internal supply voltage node for the
LinkSwitch-HF.
When the MOSFET is on, the
LinkSwitch-HF
runs off of the energy stored in the bypass capacitor. Extremely
low power consumption of the internal circuitry allows the
LinkSwitch-HF
to operate continuously from the current drawn
from the DRAIN pin.Abypass capacitor value of 0.1
µF
is sufficient
for both high frequency decoupling and energy storage.
In addition, there is a 6.3 V shunt regulator clamping the
BYPASS pin at 6.3 V when current is provided to the BYPASS
pin through an external resistor. This facilitates powering of
LinkSwitch-HF
externally through a bias winding to decrease
the no-load consumption to less than 50 mW.
BYPASS Pin Under-Voltage
The BYPASS pin under-voltage circuitry disables the power
MOSFET when the BYPASS pin voltage drops below 4.85 V.
Once the BYPASS pin voltage drops below 4.85 V, it must rise
back to 5.8 V to enable (turn-on) the power MOSFET.
Over-Temperature Protection
The thermal shutdown circuitry senses the die temperature.
The threshold is set at 142
°C
typical with a 75
°C
hysteresis.
When the die temperature rises above this threshold (142
°C)
the
power MOSFET is disabled and remains disabled until the die
temperature falls by 75
°C,
at which point it is re-enabled.
Current Limit
The current limit circuit senses the current in the power MOSFET.
When this current exceeds the internal threshold (I
LIMIT
), the
power MOSFET is turned off for the remainder of that cycle.
The leading edge blanking circuit inhibits the current limit
comparator for a short time (t
LEB
) after the power MOSFET
is turned on. This leading edge blanking time has been set so
that current spikes caused by capacitance and rectifier reverse
recovery time will not cause premature termination of the
switching pulse.
Auto-Restart
In the event of a fault condition such as output overload, output
short circuit, or an open loop condition,
LinkSwitch-HF
enters
into auto-restart operation. An internal counter clocked by the
oscillator gets reset every time the FB pin is pulled high. If
the FB pin is not pulled high for 30 ms, the power MOSFET
switching is disabled for 650 ms. The auto-restart alternately
enables and disables the switching of the power MOSFET until
the fault condition is removed.
PI-3857-022504
600
500
400
300
200
100
0
208 kHz
192 kHz
V
DRAIN
0
6.4
Figure 4. Frequency Jitter.
Time (µs)
F
2/05
3
LNK353/354
CY1
100 pF
T1
EE16
D6
SS14
9
5.7 V,
400 mA
J3-2
C6
330
µF
16 V
Q1
MMST
3906
VR1
BZX79B5V1
5.1 V, 2%
R9
200
Ω
R6
6.8
Ω
R7
220
Ω
RTN
J3-1
D1
1N4005
RF1
8.2
Ω
2.5 W
J1
85-265
VAC
J2
D2
1N4005
R1
100 kΩ
C3
2.2 nF
400 V
R3
200
Ω
5 4 5
R5
68
Ω
C5
2.2 nF
3
NC NC
8
D5
1N4007GP
C1
4.7
µF
400 V
C2
4.7
µF
400 V
LinkSwitch-HF
D
FB
BP
R4
5.1 kΩ
R8
390
Ω
D3
1N4005
D4
1N4005
U1
LNK354P
S
L1
1 mH
C4
100 nF
U2B
U2A
PC817D PC817D
R10
2.4
Ω
1W
PI-3891-070204
Figure 5. Universal Input, 5.7 V, 400 mA, Constant Voltage, Constant Current Battery Charger Using LinkSwitch-HF.
Applications Example
A 2.4 W CC/CV Charger Adapter
The circuit shown in Figure 5 is a typical implementation of
a 5.7 V, 400 mA, constant voltage, constant current (CV/CC)
battery charger.
The input bridge formed by diodes D1-D4, rectifies the AC
input voltage. The rectified AC is then filtered by the bulk
storage capacitors C1 and C2. Resistor RF1 is a flameproof,
fusible, wire wound type and functions as a fuse, inrush current
limiter and, together with the π filter formed by C1, C2 and L1,
differential mode noise attenuator.
This simple EMI filtering, together with the frequency jittering
of
LinkSwitch-HF
(U1), a small value Y1 capacitor (CY1),
and shield windings within T1, and a secondary-side RC
snubber (R5, C5), allows the design to meet both conducted
and radiated EMI limits. The low value of CY1 is important
to meet the requirement of low line frequency leakage current,
in this case <10
µA.
The rectified and filtered input voltage is applied to the primary
winding of T1. The other side of the transformer primary is
driven by the integrated MOSFET in U1. Diode D5, C3, R1
and R3 form the primary clamp network. This limits the peak
drain voltage due to leakage inductance. Resistor R3 allows the
use of a slow, low cost rectifier diode by limiting the reverse
current through D5 when U1 turns on. The selection of a slow
diode improves efficiency and conducted EMI.
Output rectification is provided by Schottky diode D6. The low
forward voltage provides high efficiency across the operating
range and the low ESR capacitor C6 minimizes output voltage
ripple.
In constant voltage (CV) mode, the output voltage is set by the
Zener diode VR1 and the emitter-base voltage of PNP transistor
Q1. The V
BE
of Q1 divided by the value of R7 sets the bias
current through VR1 (~2.7 mA). When the output voltage
exceeds the threshold voltage determined by Q1 and VR1, Q1
is turned on and current flows through the LED of U2. As the
LED current increases, the current fed into the FEEDBACK
pin increases, disabling further switching cycles of U1. At
very light loads, almost all switching cycles will be disabled,
giving a low effective switching frequency and providing low
no-load consumption.
During load transients, R6 and R8 ensure that the ratings of Q1 are
not exceeded while R4 prevents C4 from being discharged.
Resistors R9 and R10 form the constant current (CC) sense
circuit. Above approximately 400 mA, the voltage across the
sense resistor exceeds the optocoupler diode forward conduction
voltage of approximately 1 V. The current through the LED
is therefore determined by the output current and CC control
dominates over the CV feedback loop. CC control is maintained
even under output short circuit conditions.
4
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LNK353/354
Key Application Considerations
LinkSwitch-HF
Design Considerations
Output Power Table
Data sheet maximum output power table (Table 1) represents
the maximum practical continuous output power level that can
be obtained under the following assumed conditions:
1. The minimum DC input voltage is 90 V or higher for 85 VAC
input, or 240 V or higher for 230 VAC input or 115 VAC
with a voltage doubler. The value of the input capacitance
should be large enough to meet these criteria for AC input
designs.
2. Secondary output of 5.5 V with a Schottky rectifier diode.
3. Assumed efficiency of 70%.
4. Operating frequency of f
OSC(min)
and I
LIMIT(min)
.
5. Voltage only output (no secondary side constant current
circuit).
6. Continuous mode operation (0.6 ≤ K
P
≤ 1).
7. The part is board mounted with SOURCE pins soldered
to a sufficient area of copper to keep the SOURCE pin
temperature at or below 100 °C.
8. Ambient temperature of 50 °C for open frame designs
and an internal enclosure temperature of 60 °C for adapter
designs.
Below a value of 1, K
P
is the ratio of ripple to peak primary
current. Above a value of 1, K
P
is the ratio of primary MOSFET
off time to the secondary diode conduction time.
Operating at a lower effective switching frequency can simplify
meeting conducted and radiated EMI limits, especially for
designs where the safety Y capacitor must be eliminated. By
using a lower effective full load frequency, the calculated
value of the primary inductance is higher than required for
power delivery. However, the maximum power capability at
this lower operating frequency will be lower than the values
shown in Table 1.
Audible Noise
The cycle skipping mode of operation used in
LinkSwitch-HF
can generate audio frequency components in the transformer.
To limit this audible noise generation, the transformer should
be designed such that the peak core flux density is below
1250 Gauss (125 mT). Following this guideline and using the
standard transformer production technique of dip varnishing
practically eliminates audible noise. Higher flux densities
are possible however, careful evaluation of the audible noise
performance should be made using production transformer
samples before approving the design.
Ceramic capacitors that use dielectrics such as Z5U, when used
in clamp circuits, may also generate audio noise. If this is the
case, try replacing them with a capacitor having a different
dielectric, for example a polyester film type.
LinkSwitch-HF
Layout Considerations
See Figure 6 for a recommended circuit board layout for
LinkSwitch-HF.
Single Point Grounding
Use a single point ground connection from the input filter
capacitor to the area of copper connected to the SOURCE
pins.
Bypass Capacitor (C
BP
)
The BYPASS pin capacitor should be located as near as possible
to the BYPASS and SOURCE pins.
Primary Loop Area
The area of the primary loop that connects the input filter
capacitor, transformer primary and
LinkSwitch-HF
together
should be kept as small as possible.
Primary Clamp Circuit
A clamp is used to limit peak voltage on the DRAIN pin at turn
off. This can be achieved by using an RCD clamp (as shown
in Figure 5) or a Zener (~200 V) and diode clamp across the
primary winding. In all cases, to minimize EMI, care should be
taken to minimize the circuit path from the clamp components
to the transformer and
LinkSwitch-HF.
Thermal Considerations
The copper area underneath the
LinkSwitch-HF
acts not only
as a single point ground, but also as a heatsink. As this area is
connected to the quiet source node, this area should be maximized
for good heatsinking of
LinkSwitch-HF.
The same applies to
the cathode of the output diode.
Y-Capacitor
The placement of the Y-capacitor should be directly from
the primary input filter capacitor positive terminal to the
common/return terminal of the transformer secondary. Such
a placement will route high magnitude common mode surge
currents away from the
LinkSwitch-HF
device. Note that if an
input π (C, L, C) EMI filter is used, then the inductor in the
filter should be placed between the negative terminals of the
input filter capacitors.
Optocoupler
Place the optocoupler physically close to the
LinkSwitch-HF
to
minimize the primary side trace lengths. Keep the high current,
high voltage drain and clamp traces away from the optocoupler
to prevent noise pick up.
Output Diode
For best performance, the area of the loop connecting the
secondary winding, the output diode and the output filter
capacitor should be minimized. In addition, sufficient copper
area should be provided at the anode and cathode terminals
F
2/05
5
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