NLX2G02
Dual 2-Input NOR Gate
The NLX2G02 is an advanced high-speed dual 2-input CMOS NOR
gate in ultra-small footprint.
The NLX2G02 input structures provide protection when voltages up
to 7.0 volts are applied, regardless of the supply voltage.
Features
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MARKING
DIAGRAMS
ULLGA8
1.45 x 1.0
CASE 613AA
ULLGA8
1.6 x 1.0
CASE 613AB
ULLGA8
1.95 x 1.0
CASE 613AC
TM
G
•
•
•
•
•
•
•
High Speed: t
PD
2.5 ns (typical) at V
CC
= 5.0 V
Designed for 1.65 V to 5.5 V V
CC
Operation
Low Power Dissipation: I
CC
= 1
mA
(Max) at T
A
= 25°C
24 mA Balanced Output Sink and Source Capability
Balanced Propagation Delays
Overvoltage Tolerant (OVT) Input Pins
This is a Pb−Free Device
1
1
AKM
G
A1
1
8
V
CC
1
AKM
G
B1
2
7
Y1
UDFN8
1.45 x 1.0
CASE 517BZ
XM
1
Y2
3
6
B2
A1
B1
IEEE/IEC
≥1
Y1
Y2
UDFN8
1.6 x 1.0
CASE 517BY
XM
1
GND
4
5
A2
A2
B2
Figure 1. Pinout
PIN ASSIGNMENT
Pin
1
2
3
4
5
6
7
8
Function
A1
B1
Y2
GND
A2
B2
Y1
V
CC
A
L
L
H
H
Figure 2. Logic Symbol
XX
M
G
UDFN8
1.95 x 1.0
CASE 517CA
XM
1
FUNCTION TABLE
Y=A+B
Inputs
B
L
H
L
H
Output
Y
H
L
L
L
= Specific Device Code
= Date Code
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
H = HIGH Logic Level
L = LOW Logic Level
©
Semiconductor Components Industries, LLC, 2012
July, 2012
−
Rev. 2
1
Publication Order Number:
NLX2G02/D
NLX2G02
MAXIMUM RATINGS
Symbol
V
CC
V
IN
V
OUT
I
IK
I
OK
I
O
I
CC
I
GND
T
STG
T
L
T
J
q
JA
P
D
MSL
F
R
V
ESD
DC Supply Voltage
DC Input Voltage
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Source/Sink Current
DC Supply Current per Supply Pin
DC Ground Current per Ground Pin
Storage Temperature Range
Lead Temperature, 1 mm from Case for 10 Seconds
Junction Temperature Under Bias
Thermal Resistance (Note 1)
Power Dissipation in Still Air at 85°C
Moisture Sensitivity
Flammability Rating
ESD Withstand Voltage
Oxygen Index: 28 to 34
Human Body Model (Note 2)
Machine Model (Note 3)
Charged Device Model (Note 4)
(Note 5)
V
IN
< GND
V
OUT
< GND
Parameter
Value
*0.5
to +7.0
*0.5
to +7.0
*0.5
to V
CC
+ 7.0
*50
*50
$50
$100
$100
*65
to
)150
260
150
N/A
N/A
Level 1
UL 94 V−0 @ 0.125 in
2000
> 200
N/A
$500
V
Unit
V
V
V
mA
mA
mA
mA
mA
°C
°C
°C
°C/W
mW
I
Latchup
Latchup Performance Above V
CC
and Below GND at 125°C
mA
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2−ounce copper trace with no air flow.
2. Tested to EIA/JESD22−A114−A.
3. Tested to EIA/JESD22−A115−A.
4. Tested to JESD22−C101−A.
5. Tested to EIA/JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
IN
V
OUT
T
A
Dt/DV
Power DC Supply Voltage
Digital Input Voltage (Note 6)
Output Voltage
Operating Free−Air Temperature
Input Transition Rise or Fall Rate
V
CC
= 1.8 V
$0.15
V
V
CC
= 2.5 V
$0.2
V
V
CC
= 3.3 V
$0.3
V
V
CC
= 5.0 V
$0.5
V
Parameter
Operating
Data Retention Only
Min
1.65
1.5
0
0
−55
0
0
0
0
Max
5.5
5.5
5.5
V
CC
+125
20
20
10
5
Unit
V
V
V
°C
ns/V
6. Unused inputs may not be left open. All inputs must be tied to a high− or low−logic input voltage level.
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2
NLX2G02
DC ELECTRICAL CHARACTERISTICS
V
CC
(V)
1.65
2.3 to 5.5
1.65
2.3 to 5.5
V
IN
= V
IH
or V
IL
,
I
OH
=
−100
mA
V
IN
= V
IH
or V
IL
I
OH
=
−4
mA
I
OH
=
−8
mA
I
OH
=
−12
mA
I
OH
=
−16
mA
I
OH
=
−24
mA
I
OH
=
−32
mA
V
OL
Low−Level
Output Voltage
V
IN
= V
IH
or V
IL
,
I
OL
= 100
mA
V
IN
= V
IH
or V
IL
I
OL
= 4 mA
I
OL
= 8 mA
I
OL
= 12 mA
I
OL
= 16 mA
I
OL
= 24 mA
I
OL
= 32 mA
I
IN
I
OFF
I
CC
Input Leakage
Current
Power−Off Input
Leakage Current
Quiescent Supply
Current
0
≤
V
IN
≤
5.5 V
V
IN
= 5.5 V
V
IN
= V
CC
or
GND
1.65 to 5.5
V
CC
−
0.1
1.29
1.9
2.2
2.4
2.3
3.8
V
CC
T
A
= 255C
Min
0.75 x
V
CC
0.7 x
V
CC
0.25 x
V
CC
0.3 x
V
CC
V
CC
−
0.1
1.29
1.9
2.2
2.4
2.3
3.8
0.1
0.1
Typ
Max
T
A
3
855C
Min
0.75 x
V
CC
0.7 x
V
CC
0.25 x
V
CC
0.3 x
V
CC
V
CC
−
0.1
1.29
1.9
2.2
2.4
2.3
3.8
0.1
V
Max
T
A
=
−555C
to
+1255C
Min
0.75 x
V
CC
0.7 x
V
CC
0.25 x
V
CC
0.3 x
V
CC
Max
Unit
V
Symbol
V
IH
Parameter
High−Level Input
Voltage
Condition
V
IL
Low−Level Input
Voltage
V
V
OH
High−Level
Output Voltage
V
1.65
2.3
2.7
3.0
3.0
4.5
1.65 to 5.5
1.5
2.1
2.4
2.7
2.5
4.0
1.65
2.3
2.7
3.0
3.0
4.5
0 to 5.5
0
5.5
0.08
0.20
0.22
0.28
0.38
0.42
0.24
0.3
0.4
0.4
0.55
0.55
$0.1
1.0
1.0
0.24
0.3
0.4
0.4
0.55
0.55
$1.0
10
10
0.24
0.3
0.4
0.4
0.55
0.55
$1.0
10
10
mA
mA
mA
AC ELECTRICAL CHARACTERISTICS
t
R
= t
F
= 2.5 ns
V
CC
Symbol
t
PLH
t
PHL
Parameter
Propagation Delay
Input A to Output
(V)
1.65 to 1.95
2.3 to 2.7
3.0 to 3.6
Test Condition
R
L
= 1 MW, C
L
= 15 pF
R
L
= 1 MW, C
L
= 15 pF
R
L
= 1 MW, C
L
= 15 pF
R
L
= 500
W,
C
L
= 50 pF
4.5 to 5.5
R
L
= 1 MW, C
L
= 15 pF
R
L
= 500
W,
C
L
= 50 pF
C
IN
C
PD
Input Capacitance
Power Dissipation
Capacitance (Note 7)
5.5
3.3
5.5
V
IN
= 0 V or V
CC
10 MHz, V
IN
= 0V or
V
CC
Min
2.0
1.2
0.8
1.2
0.5
0.8
T
A
= 255C
Typ
7.4
3.3
2.6
3.2
1.9
2.5
2.5
9
11
Max
9.5
5.4
3.9
4.8
3.1
3.7
T
A
3
855C
Min
2.0
1.2
0.8
1.2
0.5
0.8
Max
9.7
5.8
4.3
5.2
3.3
4.0
pF
pF
T
A
=
−555C
to +1255C
Min
Max
Unit
ns
7. C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: I
CC(OPR
)
= C
PD
V
CC
f
in
+ I
CC
. C
PD
is used to determine the no−load dynamic
power consumption; P
D
= C
PD
V
CC2
f
in
+ I
CC
V
CC
.
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3
NLX2G02
t
f
= 3 ns
90%
50%
10%
90%
50%
10%
t
f
= 3 ns
V
CC
INPUT
GND
OUTPUT
R
L
C
L
INPUT
A and B
t
PHL
t
PLH
V
OH
A 1−MHz square input wave is recommended for
propagation delay tests.
V
OL
OUTPUT Y
50%
50%
Figure 3. Switching Waveform
Figure 4. Test Circuit
ORDERING INFORMATION
Device
NLX2G02AMX1TCG
NLX2G02BMX1TCG
NLX2G02CMX1TCG
NLX2G02DMUTCG
NLX2G02EMUTCG
NLX2G02FMUTCG
Package
ULLGA8, 1.95 x 1.0, 0.5P
(Pb−Free)
ULLGA8, 1.6 x 1.0, 0.4P
(Pb−Free)
ULLGA8, 1.45 x 1.0, 0.35P
(Pb−Free)
UDFN8, 1.95 x 1.0, 0.5P
(Pb−Free)
UDFN8, 1.6 x 1.0, 0.4P
(Pb−Free)
UDFN8, 1.45 x 1.0, 0.35P
(Pb−Free)
Shipping
†
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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4
NLX2G02
PACKAGE DIMENSIONS
UDFN8 1.6x1.0, 0.4P
CASE 517BY
ISSUE O
D
A B
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.20 MM FROM TERMINAL TIP.
4. PACKAGE DIMENSIONS EXCLUSIVE OF
BURRS AND MOLD FLASH.
DIM
A
A1
A3
b
D
E
e
L
L1
MILLIMETERS
MIN
MAX
0.45
0.55
0.00
0.05
0.13 REF
0.15
0.25
1.60 BSC
1.00 BSC
0.40 BSC
0.25
0.35
0.30
0.40
2X
2X
0.10 C
0.10 C
0.05 C
0.05 C
SIDE VIEW
e/2
e
1
4
7X
L1
ÉÉÉ
ÉÉÉ
8
PIN ONE
REFERENCE
E
TOP VIEW
A3
A
A1
C
SEATING
PLANE
RECOMMENDED
SOLDERING FOOTPRINT*
0.49
7X
L
0.26
8X
1.24
5
8X
b
0.10
0.05
0.53
M
M
1
PKG
OUTLINE
C A B
C
NOTE 3
0.40
PITCH
DIMENSIONS: MILLIMETERS
BOTTOM VIEW
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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5
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