TB62212FTAG
TOSHIBA BiCD Process Integrated Circuit Silicon Monolithic
TB62212FTAG
PWM Chopper Type Dual-Stepping Motor Driver
The TB62212FTAG is a PWM chopper type dual-stepping motor
driver.
Two stepping motor drivers can drive up to four brushed DC
motors. Incorporating two pairs of H-bridge drivers, the
TB62212FTAG can drive two DC motors or a single stepping
motor.
Features
•
•
•
Single-chip motor driver for bipolar stepping motor control
Monolithic IC structured by BiCD process.
Weight: 0.14 g(typ.)
Low ON-resistance: R
on
=
2.2
Ω
(Upper and lower sum of P- and N-channel output transistors: Tj
=
25°C @0.6 A typ.)
In large mode, ON-resistance of combined H-bridges is: R
on
= 1.1
Ω
(Upper and lower sum of P- and N-channel
output transistors: Tj
=
25°C @0.6 A typ.)
Since the IC incorporates a V
CC
regulator for internal circuit operation, an external power supply (5 V) is not
required.
Package: Quad leadless package with a backside heat sink (QFN48-P-0707-0.50: 0.5-mm lead pitch)
Maximum output withstand voltage: 40 V
Output current: 2.0 A (max) in DC (S) mode; 1.5 A (max) in Stepping (S) mode
Chopping frequency can be set by external oscillator. High-speed chopping is possible at 100 kHz or higher.
Over-current detection (ISD), thermal shutdown (TSD) and V
M
power-on reset circuits
•
•
•
•
•
•
Note)
This product is sensitive to electrostatic discharge.
ESD
HBM
Weak pin
4,6,8,10,27,29,31,33
value
-1.2kV
Please handle with care
condition
Reference 19pin (VM)
© 2014 TOSHIBA Corporation
1
2014-10-01
TB62212FTAG
Block Diagram and Pin Layout
(Brushed DC Motor(S)
×
4-Axis Control Mode)
ENABLE_C
ENABLE_D
OUT_D−
OUT_D+
OUT_C+
OUT_C−
Mode 0
26
36
ENABLE_B 37
ENABLE_A 38
Rs_D 39
Rs_D 40
OSCM 41
V
CC
42
Rs_A 43
Rs_A 44
PHASE_A 45
PHASE_B 46
NC 47
NC 48
1
NC
35
34
33
32
31
30
29
28
27
Mode 1
25
24 Mode 2
23 Digital tBLANK_CD
22 Digital tBLANK_AB
21 Rs_C
20 Rs_C
19 V
M
18 GND
17 Rs_B
16 Rs_B
15 V
ref
_D
14 V
ref
_C
13 NC
12
V
ref
_B
GND
GND
GND
NC
(Note 2)
Pre-
driver
Pre-
driver
3
ISD
Comparator
Regulator
TSD
ISD
Comparator
Controller
Comparator
ISD
ISD
Comparator
Pre-
driver
Pre-
driver
2
PHASE_C
3
PHASE_D
4
OUT_A−
5
GND
6
OUT_A+
7
GND
8
OUT_B+
9
GND
10
OUT_B−
11
V
ref
_A
Note 1: GND wiring: We recommend that a heat sink be grounded at any parts, and the board and output pins be
grounded at only one contact point. Take the heat dissipation into consideration when designing the board.
When in controlling the setting pins for each mode by SW, those pins should be pulled up to power supply
like V
CC
or pulled down to GND not to go into a high-impedance (Hi-Z) state.
Utmost care is necessary in the design of the output line, V
M
line and GND line since IC may be destroyed
due to short-circuit between outputs, to supply, or to ground.
Especially for those pins that are connected to power supply and get a large current flow (such as V
M
, RS,
OUT and GND), they should be properly wired; otherwise troubles including destruction may occur to this IC.
If the logic input pins are not wired properly, malfunction that would destroy the IC may occur due to a large
current exceeding the absolute maximum ratings.
Care should be taken in the design of board layouts and implementation of the IC.
Note 2: Mode (2, 1, 0)
(H, H, H)
=
stepper_S
×
2
(H, H, L)
=
DC_L
×
2
(H, L, H)
=
stepper_L
(H, L, L)
=
DC_S
×
4
(L, H, H)
=
DC_L
+
stepper_s
(L, H, L)
=
DC_S
×
2
+
stepper_s
2
2014-10-01
TB62212FTAG
Pin Assignment
Pin
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
Function
No connect
PHASE_C
PHASE_D
OUT_A−
GND
OUT_A+
GND
OUT_B+
GND
OUT_B−
V
ref
_A
V
ref
_B
No connect
V
ref
_C
V
ref
_D
Rs_B
Rs_B
GND
V
M
Rs_C
Rs_C
Digital
tBLANK_AB
Digital
tBLANK_CD
Mode 2
Mode 1
Mode 0
OUT_C−
GND
OUT_C+
GND
(1)
Stepping (S)
×
2
No connect
Phase input for
C
Phase input for
D
(2)
DC (L)
×
2
No connect
IN1 input for C
and D
PWM for C and
D
(3)
Stepping (L)
No connect
Phase input for
C and D
(4)
DC (S)
×
4
No connect
IN1 input for C
IN1 input for D
(5)
DC (L)
+
Stepping (S)
No connect
Phase input for
C
Phase input for
D
(6)
DC (S)
×
2
+
Stepping (S)
No connect
Phase input for
C
Phase input for
D
Negative output
Negative output Negative output
Negative output
Negative output
Negative output
for motors A and
for motors A and for motors A and
for motor A
for motors A
for motor A
B
B
B
Ground for A
Positive output
for motor A
Ground
Positive output
for motor B
Ground for B
Ground for A
Ground for A
Ground for A
Positive output
for motor A
Ground
Positive output
for motor B
Ground for B
Ground for A
Positive output
for motors A and
B
Ground
Positive output
for motors A and
B
Ground for B
Ground for A
Positive output
for motor A
Ground
Positive output
for motor B
Ground for B
Positive output
Positive output
for motors A and for motors A and
B
B
Ground
Ground
Positive output
Positive output
for motors A and for motors A and
B
B
Ground for B
Ground for B
Negative output
Negative output Negative output
Negative output
Negative output
Negative output
for motors A and
for motors A and for motors A and
for motor B
for motor B
for motor B
B
B
B
Vref for A
Vref for B
No connect
Vref for C
Vref for D
Vref for A and B
No connect
Vref for A and B
No connect
Vref for A
Vref for B
No connect
Vref for C
Vref for D
Vref for A and B
No connect
Vref for C
Vref for D
Vref for A
Vref for B
No connect
Vref for C
Vref for D
Vref for C and D Vref for C and D
Power supply for Power supply for Power supply for Power supply for Power supply for Power supply for
B
B
A and B
A and B
B
B
Power supply for Power supply for Power supply for Power supply for Power supply for Power supply for
B
B
A and B
A and B
B
B
Logic ground
V
M
reference
monitor
Logic ground
V
M
reference
monitor
Logic ground
V
M
reference
monitor
Logic ground
V
M
reference
monitor
Logic ground
V
M
reference
monitor
Logic ground
V
M
reference
monitor
Power supply for Power supply for Power supply for Power supply for Power supply for Power supply for
C
C
C
C
C
C
Power supply for Power supply for Power supply for Power supply for Power supply for Power supply for
C
C
C
C
C
C
High
High
High
tBLANK setting
(Note)
tBLANK setting
(Note)
High
High
Low
High
Low
High
tBLANK setting
(Note)
tBLANK setting
(Note)
High
Low
Low
tBLANK setting
(Note)
Low
High
High
Negative output
for motor C
Ground for C
Positive output
for motor C
Ground
tBLANK setting
(Note)
Low
High
Low
Negative output
for motor C
Ground for C
Positive output
for motor C
Ground
Negative output Negative output
Negative output
Negative output
for motors C and for motors C and
for motor C
for motor C
D
D
Ground for C
Positive output
for motor C
Ground
Ground for C
Ground for C
Ground for C
Positive output
for motor C
Ground
Positive output
Positive output
for motors C and for motors C and
D
D
Ground
Ground
3
2014-10-01
TB62212FTAG
Pin
No.
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
Function
(1)
Stepping (S)
×
2
Positive output
for motor D
Ground for D
(2)
DC (L)
×
2
(3)
Stepping (L)
(4)
DC (S)
×
4
Positive output
for motor D
Ground for D
(5)
DC (L)
+
Stepping (S)
Positive output
for motor D
Ground for D
Negative output
for motor D
Enable input for
D
Enable input for
C
No connect
IN2 input for A
and B
(6)
DC (S)
×
2
+
Stepping (S)
Positive output
for motor D
Ground for D
Negative output
for motor D
Enable input for
D
Enable input for
C
No connect
IN2 input for B
IN2 input for A
OUT_D+
GND
OUT_D−
ENABLE_D
ENABLE_C
No connect
ENABLE_B
ENABLE_A
Rs_D
Rs_D
OSCM
V
CC
Rs_A
Rs_A
PHASE_A
PHASE_B
No connect
No connect
Positive output
Positive output
for motors C and for motors C and
D
D
Ground for D
Ground for D
Negative output Negative output
Negative output
Negative output
for motors C and for motors C and
for motor D
for motor D
D
D
Enable input for
D
Enable input for
C
No connect
Enable input for
B
Enable input for
A
IN2 input for C
and D
No connect
IN2 input for A
and B
Enable input for
C and D
No connect
Enable input for
A and B
IN2 input for D
IN2 input for C
No connect
IN2 input for B
IN2 input for A
Power supply for Power supply for Power supply for Power supply for Power supply for Power supply for
D
D
C and D
C and D
D
D
Power supply for Power supply for Power supply for Power supply for Power supply for Power supply for
D
D
C and D
C and D
D
D
OSCM
Regulator
monitor
OSCM
Regulator
monitor
OSCM
Regulator
monitor
OSCM
Regulator
monitor
OSCM
Regulator
monitor
OSCM
Regulator
monitor
Power supply for Power supply for Power supply for Power supply for Power supply for Power supply for
A
A
A
A
A
A
Power supply for Power supply for Power supply for Power supply for Power supply for Power supply for
A
A
A
A
A
A
Phase input for
A
Phase input for
B
No connect
No connect
IN1 input for A
and B
PWM for A and
B
No connect
No connect
Phase input for
A and B
No connect
No connect
IN1 input for A
IN1 input for B
No connect
No connect
IN1 input for A
and B
PWM for A and
B
No connect
No connect
IN1 input for A
IN1 input for B
No connect
No connect
Pin 22,23 Note: L: No tBLANK
H: tBLANK
=
OSCM
×
3
4
2014-10-01
TB62212FTAG
Descriptions of Motor Drive Modes
(1) Stepping (S)
×
2 control mode pin name and assignment
(2) DC (L)
×
2 control mode pin name and assignment
(3) Stepping (L)
×
1 control mode pin name and assignment
(4) DC (S)
×
4 control mode pin name and assignment
Mode (2, 1, 0)=(H, H, H)
Mode (2, 1, 0)=(H, H, L)
Mode (2, 1, 0)=(H, L, H)
Mode (2, 1, 0)=(H, L, L)
(5) Stepping (S)
×
1 control mode
+
DC (L)
×
1 control mode pin name and assignment Mode (2, 1, 0)=(L, H, H)
(6) Stepping (S)
×
1 control mode
+
DC (S)
×
2 control mode pin name and assignment
Mode (2, 1, 0)=(L, H, L)
*:
In the modes that include DC (S) mode, the digital tBLANK time can be separately set for each axis pair, axes A
and B and axes C and D.
In DC (S)
×
4-axis control mode, the external short brake function cannot be used. Thus, the short brake operation
should be performed by using the IN1 and IN2 inputs.
The motor drive Mode(2, 1, 0)= (H, L, L) is provided only for Toshiba testing and must not be used during normal
operation.
Note 1: In Combination mode, such as Stepping (L) and DC (L) modes, the impedance outside the IC should be
balanced.
Note 2: In large mode, if the impedance of wiring to mutually connected output transistors is unbalanced, the current
that flows through the transistor also becomes unbalanced and may exceed the absolute maximum rating of
the transistor, thus permanently damaging the transistors.
5
2014-10-01
微控制器 MCU
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