19-2037; Rev 0; 5/01
14-Bit ADC, 200ksps, +5V Single-Supply
with Reference
General Description
The MAX1142/MAX1143 are 200ksps, 14-bit ADCs.
These serially interfaced ADCs connect directly to
SPI™, QSPI™, and MICROWIRE™ devices without
external logic. They combine an input scaling network,
internal track/hold, a clock, +4.096V reference, and
three general-purpose digital output pins (for external
multiplexer or PGA control) in a 20-pin SSOP package.
The excellent dynamic performance (SINAD
≥
81dB),
high-speed (200ksps), and low power (7.5mA) of these
ADCs, make them ideal for applications such as indus-
trial process control, instrumentation, and medical
applications. The MAX1142 accepts input signals of 0
to +12V (unipolar) or ±12V (bipolar), while the
MAX1143 accepts input signals of 0 to +4.096V (unipo-
lar) or ±4.096V (bipolar). Operating from a single
+4.75V to +5.25V analog supply and a +4.75V to
+5.25V digital supply, power-down modes reduce cur-
rent consumption to 1mA at 10ksps and further reduce
supply current to less than 20µA at slower data rates.
A serial strobe output (SSTRB) allows direct connection
to the TMS320-family of digital signal processors. The
MAX1142/MAX1143 user can select either the internal
clock, or an external serial-interface clock for the ADC
to perform analog-to-digital conversions.
The MAX1142/MAX1143 feature internal calibration cir-
cuitry to correct linearity and offset errors. On-demand
calibration allows the user to optimize performance.
Three user-programmable logic outputs are provided
for the control of an 8-channel MUX or a PGA.
Features
o
200ksps (Bipolar) and 150ksps (Unipolar)
Sampling ADC
o
14-Bits, No Missing Codes
o
1LSB INL Guaranteed
o
81dB (min) SINAD
o
+5V Single-Supply Operation
o
Low Power Operation, 7.5mA (Unipolar Mode)
o
2.5µA Shutdown Mode
o
Software-Configurable Unipolar & Bipolar Input
Ranges
0 to +12V and ±12V (MAX1142)
0 to +4.096V and ±4.096V (MAX1143)
Internal or External Reference
o
Internal or External Clock
o
SPI/QSPI/MICROWIRE-Compatible Wire Serial
Interface
o
Three User-Programmable Logic Outputs
o
Small 20-Pin SSOP Package
MAX1142/MAX1143
Ordering Information
PART
MAX1142ACAP
TEMP. RANGE
0°C to +70°C
0°C to +70°C
PIN-
PACKAGE
20 SSOP
20 SSOP
INL
(LSB)
±1
±2
Applications
Industrial Process Control
Industrial I/O Modules
Data-Acquisition Systems
Medical Instruments
Portable and Battery-Powered Equipment
MAX1142BCAP
Ordering Information continued at end of data sheet.
Pin Configuration
TOP VIEW
REF 1
REFADJ 2
AGND 3
AV
DD
4
DGND 5
SHDN
6
20 AIN
19 AGND
18 CREF
17
CS
MAX1142
MAX1143
16 DIN
15 DV
DD
14 DGND
13 SCLK
12 RST
11 DOUT
Functional Diagram appears at end of data sheet.
Typical Application Circuit appears at end of data sheet.
SPI and QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corp.
P2 7
P1 8
P0 9
SSTRB 10
SSOP
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
14-Bit ADC, 200ksps, +5V Single-Supply
with Reference
MAX1142/MAX1143
ABSOLUTE MAXIMUM RATINGS
AV
DD
to AGND, DV
DD
to DGND .............................-0.3V to +6V
AGND to DGND.....................................................-0.3V to +0.3V
AIN to AGND.....................................................................±16.5V
REFADJ, CREF, REF to AGND.................-0.3V to (AV
DD
+ 0.3V)
Digital Inputs to DGND.............................................-0.3V to +6V
Digital Outputs to DGND .........................-0.3V to (DV
DD
+ 0.3V)
Continuous Power Dissipation (T
A
= +70°C)
20-SSOP (derate 8.00mW/°C above +70°C) ...............640mW
Operating Temperature Ranges
MAX114_CAP ......................................................0°C to +70°C
MAX114_EAP....................................................-40°C to +85°C
Storage Temperature Range .............................-60°C to +150°C
Junction Temperature ......................................................+150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(AV
DD
= DV
DD
= +5V ±5%, f
SCLK
= 4.8MHz, external clock (50% duty cycle), 24 clocks/conversion (200ksps), bipolar input, external
V
REF
= +4.096V, V
REFADJ
= AV
DD
, C
REF
= 2.2µF, C
CREF
= 1µF, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at
T
A
= +25°C.)
PARAMETER
DC ACCURACY
(Note 1)
Resolution
Relative Accuracy (Note 2)
Differential Nonlinearity
Transition Noise
Offset Error
Gain Error (Note 3)
Offset Drift (Bipolar and Unipolar)
Gain Drift (Bipolar and Unipolar)
Unipolar
Bipolar
Unipolar
Bipolar
Excluding reference drift
Excluding reference drift
±1
±1
INL
DNL
Unipolar Mode
MAX114_A
MAX114_B
Unipolar Mode
0.34
±4
±6
±0.2
±0.3
14
±1
±2
±1
Bits
LSB
LSB
LSB RMS
mV
%FSR
ppm/
o
C
ppm/
o
C
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DYNAMIC SPECIFICATIONS
(5kHz sine-wave input, 200ksps, 4.8MHz clock, bipolar input mode).
(MAX1142, 24Vp-p. MAX1143, 8.192Vp-p)
SINAD
SNR
THD
SFDR
ANALOG INPUT
MAX1142
Input Range
MAX1143
Unipolar
Bipolar
Unipolar
Bipolar
0
-12
0
-4.096
12
12
4.096
4.096
V
f
IN
= 5kHz
f
IN
= 100kHz
f
IN
= 5kHz
f
IN
= 100kHz
f
IN
= 5kHz
f
IN
= 100kHz
f
IN
= 5kHz
f
IN
= 100kHz
90
95
91
82
82
-88
81
82
dB
dB
dB
dB
2
_______________________________________________________________________________________
14-Bit ADC, 200ksps, +5V Single-Supply
with Reference
ELECTRICAL CHARACTERISTICS (continued)
(AV
DD
= DV
DD
= +5V ±5%, f
SCLK
= 4.8MHz, external clock (50% duty cycle), 24 clocks/conversion (200ksps), bipolar input, external
V
REF
= +4.096V, V
REFADJ
= AV
DD
, C
REF
= 2.2µF, C
CREF
= 1µF, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at
T
A
= +25°C.)
PARAMETER
SYMBOL
MAX1142
Input Impedance
MAX1143
Input Capacitance
CONVERSION RATE
Internal Clock Frequency
Aperture Delay
Aperture Jitter
t
AD
t
AJ
Unipolar
Bipolar
Unipolar
Bipolar
Unipolar
Bipolar
0.1
0.1
4.17
4.17
8
5
4
10
50
3
4.8
125
200
240
240
MHz
ns
ps
CONDITIONS
Unipolar
Bipolar
Unipolar
Bipolar
MIN
7.5
5.9
100
3.4
TYP
10.0
7.9
1000
4.5
32
pF
kΩ
MAX
UNITS
MAX1142/MAX1143
MODE 1 (24 External Clock Cycles per Conversion)
External Clock Frequency
Sample Rate
Conversion Time (Note 4)
MODE 2 (Internal Clock Mode)
External Clock Frequency
(Data Transfer Only)
Conversion Time
Acquisition Time
SSTRB Low Pulse Width
Unipolar
Bipolar
f
SCLK
f
S
= f
SCLK
/32
t
CONV+ACQ
=
32 / f
SCLK
V
REF
Unipolar or Bipolar
Unipolar or Bipolar
Unipolar or Bipolar
1.82
1.14
0.1
3.125
6.67
4.8
150
320
4
8
6
MHz
µs
µs
f
SCLK
f
S
= f
SCLK
/24
t
CONV+ACQ
=
24 / f
SCLK
MHz
ksps
µs
MODE 3 (32 External Clock Cycles per Conversion)
External Clock Frequency
Sample Rate
Conversion Time (Note 4)
INTERNAL REFERENCE
Output Voltage
REF Short Circuit Current
Output Tempco
Capacitive Bypass at REF
Maximum Capacitive Bypass at
REFADJ
REFADJ Output Voltage
REFADJ Input Range
For small adjustments from 4.096V
0.47
10
4.096
±100
4.056
4.096
24
±20
10
4.136
V
mA
ppm/
o
C
µF
µF
V
mV
MHz
ksps
µs
_______________________________________________________________________________________
3
14-Bit ADC, 200ksps, +5V Single-Supply
with Reference
MAX1142/MAX1143
ELECTRICAL CHARACTERISTICS (continued)
(AV
DD
= DV
DD
= +5V ±5%, f
SCLK
= 4.8MHz, external clock (50% duty cycle), 24 clocks/conversion (200ksps), bipolar input, external
V
REF
= +4.096V, V
REFADJ
= AV
DD
, C
REF
= 2.2µF, C
CREF
= 1µF, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at
T
A
= +25°C.)
PARAMETER
REFADJ Buffer Disable
Threshold
Buffer Voltage Gain
EXTERNAL REFERENCE (Reference buffer disabled. Reference applied to REF)
Input Range (Notes 5 and 6)
V
REF
= 4.096V, f
SCLK
= 4.8MHz
Input Current
DIGITAL INPUTS
Input High Voltage
Input Low Voltage
Input Leakage
Input Hysteresis
Input Capacitance
DIGITAL OUTPUTS
Output High Voltage
Output Low Voltage
Three-State Leakage Current
Three-State Output
Capacitance
POWER SUPPLIES
Analog Supply (Note 7)
Digital Supply (Note 7)
Analog Supply Current
AV
DD
DV
DD
Unipolar Mode
I
ANALOG
Bipolar Mode
SHDN
= 0, or software power-down mode
Unipolar or Bipolar Mode
SHDN
= 0, or software power-down mode
AV
DD
= DV
DD
= 4.75V to 5.25V,
4.75
4.75
5
5
5
8.5
0.3
2.5
2.2
72
5.25
5.25
8
11
10
3.5
10
V
V
mA
µA
mA
µA
dB
V
OH
V
OL
I
L
I
SOURCE
= 0.5mA
I
SINK
= 5mA
I
SINK
= 16mA
CS
= DV
DD
CS
= DV
DD
10
DV
DD
-
0.5
0.4
0.8
±10
V
V
µA
pF
V
IH
V
IL
I
IN
V
HYST
C
IN
V
IN
= 0 or DV
DD
0.2
10
2.4
0.8
±1
V
V
µA
V
pF
V
REF
= 4.096V, f
SCLK
= 0
In power-down, f
SCLK
= 0
3.0
4.096
250
230
0.1
µA
4.2
V
SYMBOL
CONDITIONS
To power-down the internal reference
MIN
AV
DD
-
0.5V
1
TYP
MAX
AV
DD
-
0.1V
UNITS
V
V/V
Digital Supply Current
Power Supply Rejection Ratio
(Note 8)
I
DIGITAL
PSRR
4
_______________________________________________________________________________________
14-Bit ADC, 200ksps, +5V Single-Supply
with Reference
TIMING CHARACTERISTICS (Figures 5 and 6)
(AV
DD
= DV
DD
= +5V ±5%, T
A
= T
MIN
to T
MAX
, unless otherwise noted.)
PARAMETER
Acquisition Time
DIN to SCLK Setup
DIN to SCLK Hold
SCLK to DOUT Valid
CS
Fall to DOUT Enable
CS
Rise to DOUT Disable
CS
to SCLK Rise Setup
CS
to SCLK Rise Hold
SCLK High Pulse Width
SCLK Low Pulse Width
SCLK Fall to SSTRB
CS
Fall to SSTRB Enable
CS
Rise to SSTRB Disable
SSTRB Rise to SCLK Rise
RST
Pulse Width
SYMBOL
t
ACQ
t
DS
t
DH
t
DO
t
DV
t
TR
t
CSS
t
CSH
t
CH
t
CL
t
SSTRB
t
SDV
t
STR
t
SCK
t
RS
C
LOAD
= 50pF
C
LOAD
= 50pF, External clock mode
C
LOAD
= 50pF, External clock mode
Internal clock mode
0
208
C
LOAD
= 50pF
C
LOAD
= 50pF
100
0
80
80
80
80
80
CONDITIONS
MIN
1.14
50
0
70
80
80
TYP
MAX
UNIT
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MAX1142/MAX1143
5
Note 1:
Tested at AV
DD
= DV
DD
= +5V, bipolar input mode.
Note 2:
Relative accuracy is the deviation of the analog value at any code from its theoretical value after the gain error and offset
error have been nulled.
Note 3:
Offset nulled.
Note 4:
Conversion time is defined as the number of clock cycles multiplied by the clock period, clock has 50% duty cycle.
Includes the acquisition time.
Note 5:
ADC performance is limited by the converter’s noise floor, typically 300µVp-p.
Note 6
When an external reference has a different voltage than the specified typical value, the full scale of the ADC will scale
proportionally.
Note 7:
Electrical characteristics are guaranteed from AV
DD(MIN)
= DV
DD(MIN)
to AV
DD(MAX)
= DV
DD(MAX)
. For operations beyond
this range, see the
Typical Operating Characteristics.
For guaranteed specifications beyond the limits, contact
the factory.
Note 8:
Defined as the change in positive full-scale caused by a ±5% variation in the nominal supply voltage.
_______________________________________________________________________________________
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