INTEGRATED CIRCUITS
74F240
Octal inverting buffer (3-state)
Product data
Supersedes data of 2002 Mar 18
2004 Feb 25
Philips
Semiconductors
Philips Semiconductors
Product data
Octal inverting buffer
74F240
FEATURES
•
Octal bus interface
•
3-state buffer outputs sink 64 mA
•
15 mA source current
TYPE
74F240
TYPICAL PROPAGATION DELAY
4.3 ns
DESCRIPTION
The 74F240 is an octal inverting buffer that is ideal for driving bus
lines of buffer memory address registers. The outputs are all
capable of sinking 64 mA and sourcing up to 15 mA. The device
features two output enables, each controlling four of the 3-state
outputs.
TYPICAL SUPPLY CURRENT (TOTAL)
37 mA
ORDERING INFORMATION
ORDER CODE
DESCRIPTION
20-pin plastic DIP
20-pin plastic SOL
20-pin plastic SSOP II
COMMERCIAL RANGE
V
CC
= 5 V
±10%,
T
amb
= 0
°C
to +70
°C
N74F240N
N74F240D
N74F240DB
PKG DWG #
SOT146-1
SOT163-1
SOT339-1
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
PINS
Ian, Ibn
OEa, OEb
Yan, Ybn
Data inputs
Output enable inputs (Active-LOW)
Data outputs
DESCRIPTION
74F (U.L.)
HIGH/LOW
1.0/1.67
1.0/0.33
750/106.7
LOAD VALUE
HIGH/LOW
20
µA/1.0
mA
20
µA/0.2
mA
15 mA/64 mA
Note to input and output loading and fan out table
One (1.0) FAST unit load is defined as: 20
µA
in the HIGH state and 0.6 mA in the LOW state.
PIN CONFIGURATION
OEa
Ia0
Yb0
Ia1
Yb1
Ia2
Yb2
Ia3
Yb3
1
2
3
4
5
6
7
8
9
20 V
CC
19 OEb
18 Ya0
17 Ib0
16 Ya1
15 Ib1
14 Ya2
13 Ib2
12 Ya3
11 Ib3
LOGIC SYMBOL
2
4
6
8
17
15
13
11
Ia0
1
19
OEa
OEb
Ia1
Ia2
Ia3
Ib0
Ib1
Ib2 Ib3
Ya0 Ya1 Ya2 Ya3 Yb0 Yb1 Yb2 Yb3
18
V
CC
= Pin 20
GND = Pin 10
16
14
12
3
5
7
9
GND 10
SF00320
SF00321
2004 Feb 25
2
Philips Semiconductors
Product data
Octal inverting buffer
74F240
IEC/IEEE SYMBOL
1
19
EN1
EN2
LOGIC DIAGRAM
Ia0
2
18
Ya0
Ib0
17
3
Yb0
Ia1
2
4
6
8
17
15
13
11
2
2D
1
18
16
14
12
3
5
7
9
OEa
Ia3
Ia2
4
16
Ya1
Ib1
15
5
Yb1
6
14
Ya2
Ib2
13
7
Yb2
8
12
Ya3
Ib3
11
9
Yb3
1
OEb
10
SF00322
V
CC
= Pin 20
GND = Pin 10
SF00323
FUNCTION TABLE
INPUTS
OEa
L
L
H
Ia
L
H
X
OEb
L
L
H
Ib
L
H
X
OUTPUTS
Ya
H
L
Z
Yb
H
L
Z
NOTES:
H = High voltage level
L = Low voltage level
X = Don’t care
Z = High impedance “off” state
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free air temperature range.)
SYMBOL
V
CC
V
IN
I
IN
V
OUT
I
OUT
T
amb
T
stg
Supply voltage
Input voltage
Input current
Voltage applied to output in high output state
Current applied to output in low output state
Operating free air temperature range
Storage temperature range
PARAMETER
RATING
–0.5 to +7.0
–0.5 to +7.0
–30 to +5
–0.5 to V
CC
128
0 to +70
–65 to +150
UNIT
V
V
mA
V
mA
°C
°C
RECOMMENDED OPERATING CONDITIONS
LIMITS
SYMBOL
V
CC
V
IH
V
IL
I
Ik
I
OH
I
OL
T
amb
2004 Feb 25
Supply voltage
High-level input voltage
Low-level input voltage
Input clamp current
High-level output current
Low-level output current
Operating free air temperature range
3
0
PARAMETER
MIN
4.5
2.0
0.8
–18
–15
64
+70
NOM
5.0
MAX
5.5
UNIT
V
V
V
mA
mA
mA
°C
Philips Semiconductors
Product data
Octal inverting buffer
74F240
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
PARAMETER
TEST CONDITIONS
1
MIN
I
O
= –3 mA
3
OH
±10%V
CC
±5%V
CC
±10%V
CC
±5%V
CC
±10%V
CC
±5%V
CC
0.42
–0.73
2.4
2.7
2.0
2.0
0.50
0.50
–1.2
100
20
–1.0
50
–50
–100
12
V
CC
= MAX
50
35
–225
18
70
45
3.4
LIMITS
TYP
2
MAX
V
V
V
V
V
V
V
µA
µA
mA
µA
µA
mA
mA
mA
mA
UNIT
V
O
OH
High-level
High level output voltage
V
CC
= MIN; V
IL
= MAX; V
IH
=
MIN
I
O
= –15 mA
15
OH
V
O
OL
V
IK
I
I
I
IH
I
IL
I
OZH
I
OZL
I
OS
I
CC
Low-level
Low level output voltage
Input clamp voltage
Input current at maximum input voltage
High-level input current
Low-level input current
Off-state output current,
high-level voltage applied
Off-state output current,
low-level voltage applied
Short-circuit output current
3
I
CCH
Supply current (total)
I
CCL
I
CCZ
V
CC
= MIN; V
IL
= MAX; V
IH
=
MIN
V
CC
= MIN; I
I
= I
IK
I
O
= MAX
OL
V
CC
= MAX; V
I
= 7.0 V
V
CC
= MAX; V
I
= 2.7 V
V
CC
= MAX; V
I
= 0.5 V
V
CC
= MAX, V
O
= 2.7 V
V
CC
= MAX, V
O
= 0.5 V
V
CC
= MAX
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V
CC
= 5 V, T
amb
= 25
°C.
3. Not more than one output should be shorted at a time. For testing I
OS
, the use of high-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged
shorting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In
any sequence of parameter tests, I
OS
tests should be performed last.
2004 Feb 25
4
Philips Semiconductors
Product data
Octal inverting buffer
74F240
AC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL
PARAMETER
TEST
CONDITION
T
amb
= +25
°C
V
CC
= +5.0 V
C
L
= 50 pF; R
L
= 500
Ω
MIN
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Propagation delay
Ian, Ibn to Yn
Output enable time
to high or low level
Output disable time
from high or low level
Waveform 1
Waveform 2 & 3
Waveform 2 & 3
3.0
2.0
3.0
4.5
3.0
3.0
TYP
4.5
3.0
5.0
6.5
5.5
5.0
MAX
6.5
4.5
7.5
8.5
7.0
7.0
T
amb
= 0
°C
to +70
°C
V
CC
= +5.0 V
±
10%
C
L
= 50 pF; R
L
= 500
Ω
MIN
3.0
2.0
3.0
4.0
3.0
3.0
MAX
7.5
5.0
9.0
10.0
7.5
7.5
ns
ns
ns
UNIT
NOTES:
1. | t
PN
actual – t
PM
actual| for any output compared to any other output where N and M are either LH or HL.
2004 Feb 25
5
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