INTEGRATED CIRCUITS
74F283
4-bit binary full adder with fast carry
Product specification
IC15 Data Handbook
1989 Mar 03
Philips
Semiconductors
Philips Semiconductors
Product specification
4-bit binary full adder with fast carry
74F283
FEATURES
•
High speed 4-bit addition
•
Cascadable in 4-bit increments
•
Fast Internal carry look-ahead
DESCRIPTION
The 74F283 adds two 4-bit binary words (An plus Bn) plus the
incoming carry. The binary sum appears on the sum outputs
(Σ0–Σ3) and the outgoing carry (C
OUT
) according to the equation:
C
IN
+2
0
(A0+B0)+2
1
(A1+B1)+2
2
(A2+B2)+2
3
(A3+B3)
=Σ0+2Σ1+4Σ2+8Σ3+16C
OUT
where (+)=plus
Due to the symmetry of the binary add function, the 74F283 can be
used with either all active-High operands (positive logic) or with all
active-Low operands (negative logic). See Function Table. In case of
all active-Low operands (negative logic) the results
Σ1–Σ4
and C
OUT
should be interpreted also as active-Low. With active-High inputs,
C
IN
cannot be left open; it must be held Low when no “carry in” is
intended. Interchanging inputs of equal weight does not affect the
operation, thus A0, B0, C
IN
can arbitrarily be assigned to pins 5, 6,
7, etc.
Due to pin limitations, the intermediate carries of the 74F283 are not
brought out for use as inputs or outputs. However, other means can
be used to effectively insert a carry into, or bring a carry out from, an
intermediate stage.
PIN CONFIGURATION
Σ1
B1
A1
Σ0
A0
B0
C
IN
GND
1
2
3
4
5
6
7
8
16 V
CC
15 B2
14 A2
13
Σ2
12 A3
11
B3
10
Σ3
9
C
OUT
SF00852
TYPE
74F283
TYPICAL
PROPAGATION
DELAY
6.5ns
TYPICAL
SUPPLY CURRENT
(TOTAL)
40mA
ORDERING INFORMATION
DESCRIPTION
16-pin plastic DIP
16-pin plastic SO
COMMERCIAL RANGE
V
CC
= 5V
±10%,
T
amb
= 0°C to +70°C
N74F283N
N74F283D
PKG DWG #
SOT38-4
SOT109-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
A0 - A3
B0 - B3
C
IN
C
OUT
Σ0–Σ3
DESCRIPTION
A operand inputs
B operand inputs
Carry input
Carry output
Sum outputs
74F(U.L.)
HIGH/LOW
1.0/2.0
1.0/2.0
1.0/1.0
50/33
50/33
LOAD VALUE
HIGH/LOW
20µA/1.2mA
20µA/1.2mA
20µA/0.6mA
1.0mA/20mA
1.0mA/20mA
NOTE:
One (1.0) FAST Unit Load is defined as: 20µA in the High state and 0.6mA in the Low state.
LOGIC SYMBOL
LOGIC SYMBOL (IEEE/IEC)
5
0
P
3
Σ
6
2
15
11
4
1
13
10
7
CI
CO
9
3
Q
0
3
0
4
1
13
10
Σ
5
6
3
2
14 15 12 11
3
14
A0 B0 A1 B1 A2 B2 A3 B3
7
C
IN
Σ0
Σ1
Σ2
Σ3
C
OUT
9
12
V
CC
=Pin 16
GND=Pin 8
SF00853
SF00854
1989 Mar 03
2
853-0364 95944
Philips Semiconductors
Product specification
4-bit binary full adder with fast carry
74F283
LOGIC DIAGRAM
9
C
OUT
B3
11
A3
12
10
Σ3
B2
15
A2
14
13
Σ2
B1
2
1
A1
3
Σ1
B0
6
4
A0
V
CC
=Pin 16
GND=Pin 8
C
IN
5
7
Σ0
SF00855
FUNCTION TABLE
PINS
Logic levels
Active High
Active Low
C
IN
L
0
1
A0
L
0
1
A1
H
1
0
A2
L
0
1
A3
H
1
0
B0
H
1
0
B1
L
0
1
B2
L
0
1
B3
H
1
0
Σ0
H
1
0
Σ1
H
1
0
Σ2
L
0
1
Σ3
L
0
1
C
OUT
H
1
0
Example:
1001
1010
10011
(10+9=19)
(carry+5+6=12)
H = High voltage level
L = Low voltage level
1989 Mar 03
3
Philips Semiconductors
Product specification
4-bit binary full adder with fast carry
74F283
Figure A shows how to make a 3-bit adder. Tying the operand inputs
of the fourth adder (A3, B3) Low makes
Σ3
dependent only on, and
equal to, the carry from the third adder. Using somewhat the same
principle, Figure B shows a way of dividing the 74F283 into a 2-bit
and a 1-bit adder. The third stage adder (A2, B2,
Σ2)
is used as
means of getting a carry (C10) signal into the fourth stage adder (via
A2 and B2) and bringing out the carry from the second stage on
Σ2.
Note that as long as A2 and B2 are the same, whether High or Low,
they do not influence
Σ2.
Similarly, when A2 and B2 are the same,
the carry into the third stage does not influence the carry out of the
third stage. Figure C shows a method of implementing a 5-input
encoder where the inputs are equally weighted. The outputs
Σ0, Σ1
and
Σ2
present a binary number of inputs I0–I4 that are true.
Figure D shows one method of implementing a 5-input majority gate.
When three or more of the inputs I0–I4 are true, the output M4 is
true.
APPLICATIONS
C10
L
A0 B0 A1 B1 A2 B2 A3 B3
C
IN
Σ0
Σ1
Σ2
Σ3
C3
C
OUT
C
IN
A0 B0 A1 B1
A10 B10
A0 B0 A1 B1 A2 B2 A3 B3
C
IN
Σ0
Σ1
Σ2
Σ3
C
OUT
C
11
Σ0
Σ1
C2
Σ10
A.
3-bit Adder
B.
2-bit and 1-bit Adder
I2
I0
I1
L
I3
I4
I0
I1
I2
I3
I4
A0 B0 A1 B1 A2 B2 A3 B3
C
IN
Σ0
Σ1
Σ2
Σ3
C
OUT
A0 B0 A1 B1 A2 B2 A3 B3
C
IN
Σ0
Σ1
Σ2
Σ3
C
OUT
2
0
2
1
2
2
C.
5-input Encoder
D.
M4
5-input Majority Gate
SF00856
1989 Mar 03
4
Philips Semiconductors
Product specification
4-bit binary full adder with fast carry
74F283
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limits set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the
operating free-air temperature range.)
SYMBOL
V
CC
V
IN
I
IN
V
OUT
I
OUT
T
amb
T
stg
Supply voltage
Input voltage
Input current
Voltage applied to output in High output state
Current applied to output in Low output state
Operating free-air temperature range
Storage temperature
PARAMETER
RATING
–0.5 to +7.0
–0.5 to +7.0
–30 to +5
–0.5 to V
CC
40
0 to +70
–65 to +150
UNIT
V
V
mA
V
mA
°C
°C
RECOMMENDED OPERATING CONDITIONS
SYMBOL
V
CC
V
IH
V
IL
I
IK
I
OH
I
OL
T
amb
Supply voltage
High-level input voltage
Low-level input voltage
Input clamp current
High-level output current
Low-level output current
Operating free-air temperature range
0
PARAMETER
LIMITS
Min
4.5
2.0
0.8
–18
–1
20
70
Nom
5.0
Max
5.5
UNIT
V
V
V
mA
mA
mA
°C
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
LIMITS
SYMBOL
PARAMETER
TEST CONDITIONS
NO TAG
V
CC
= MIN, V
IL
= MAX
V
IH
= MIN, I
OH
= MAX
Low-level
Low level output voltage
Input clamp voltage
Input current at maximum input voltage
High-level input current
Low-level
Low level input current
C
IN
only
An, Bn
Short-circuit output current
NO TAG
Supply current (total)
4
V
CC
= MIN, V
IL
= MAX
V
IH
= MIN, I
OL
= MAX
V
CC
= MIN, I
I
= I
IK
V
CC
= MAX, V
I
= 7.0V
V
CC
= MAX, V
I
= 2.7V
V
CC
= MAX, V
I
= 0 5V
MAX
0.5V
V
CC
= MAX
V
CC
= MAX
–60
40
±10%V
CC
±5%V
CC
±10%V
CC
±5%V
CC
MIN
2.5
V
2.7
3.4
0.30
0.30
–0.73
0.50
V
0.50
–1.2
100
20
–0.6
–1.2
–150
55
V
µA
µA
mA
mA
mA
mA
TYP
NO TAG
MAX
UNIT
V
O
OH
High-level
High level output voltage
V
O
OL
V
IK
I
I
I
IH
I
IL
I
OS
I
CC
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V
CC
= 5V, T
amb
= 25°C.
3. Not more than one output should be shorted at a time. For testing I
OS
, the use of high-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I
OS
tests should be performed last.
4. I
CC
should be measured with all outputs open and the following conditions:
Condition1: all inputs grounded
Condition 2: all B inputs Low, other inputs at 4.5V
Condition 3: all inputs at 4.5V
1989 Mar 03
5
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