Supertex inc.
3-Pin Hotswap,
Inrush Current Limiter Controllers
(Negative Supply Rail)
Features
►
Pass element is only external part
►
No sense resistor required
►
Auto-adapt to pass element
►
Short circuit protection
►
UV & POR supervisory circuits
►
2.5s auto retry
►
±10V to ±72V input voltage range
►
0.6mA typical operating supply current
►
Built in clamp for AC path turn-on glitch
HV101
General Description
The
HV101 is a 3-pin hotswap controller available in the SOT-
223 package, which requires no external components other
than a pass element. The HV101 contains many of the features
found in hotswap controllers with 8 pins or more, and which
generally require many external components. These features
include undervoltage (UV) detection circuits, power on reset
(POR) supervisory circuits, inrush current limiting, short cir-
cuit protection, and auto-retry. In addition, the HV101 uses a
patent pending mechanism to sample and adapt to any pass
element, resulting in consistent hotswap profiles without any
programming.
Applications
►
-48V
central office switching (line cards)
►
+48V server networks
►
+48V storage area networks
►
+48V peripherals, routers, switches
►
+24V cellular and fixed wireless (bay stations,
line cards)
►
+24V industrial systems
►
+24V UPS systems
►
-48V PBX & ADSL systems (line cards)
►
Distributed power systems
►
Powered ethernet for VoIP
Typical Application Circuit
GND
VPP
GATE
VNN
-48V
400µF
+5.0V
COM
DC/DC
Converter
HV101
IRF530
Doc.# DSFP-HV101
B060513
Supertex inc.
www.supertex.com
HV101
Ordering Information
Part Number
HV101K5-G
Package Option
3-Lead SOT-223
Packing
2500/Reel
GATE
Pin Configuration
VNN
-G denotes a lead (Pb)-free / RoHS compliant package
Absolute Maximum Ratings
Parameter
V
PP
Input voltage
Operating ambient temperature range
Operating junction temperature range
Storage temperature range
Value
-0.3V to 75.0V
-40
o
C to +85
o
C
-40
o
C to +125
o
C
-65
o
C to +150
o
C
VPP
VNN
3-Lead SOT-223
Pin Description
Pin
VPP
VNN
GATE
Function
Positive voltage power supply to the circuit.
Negative voltage power supply to the circuit.
GATE driver output for the external N-channel
MOSFET
Absolute Maximum Ratings are those values beyond which damage to the device may
occur. Functional operation under these conditions is not implied. Continuous operation
of the device at the absolute rating level may affect device reliability. All voltages are
referenced to device ground.
Typical Thermal Resistance
Package
3-Lead SOT-223
θ
ja
106
O
C/W
Product Marking
HV101
YWW LLLL
Y = Last Digit of Year Sealed
WW = Week Sealed
L = Lot Number
= “Green” Packaging
3-Lead SOT-223
Package may or may not include the following marks: Si or
DC Electrical Characteristics
(-40 C < T
< +85°C unless otherwise specified)
o
A
Sym
V
NN
I
NN
V
UVL
V
UVH
V
GATE
SR
GATE
I
PULLUP
t
POR
t
ARD
Parameter
Supply voltage
Supply current
UV threshold (high to low)
UV hysteresis
Maximum GATE drive voltage
Initial slew rate
Post hotswap pull-up current
Insertion POR delay
Auto restart delay
Min
-72
-
12.3
-
10
1.50
8.0
6.0
1.5
1.25
Typ
-
0.6
14
1.0
12
2.50
16
11
3.5
2.50
Max
UV
1.0
15.7
-
14
3.25
-
-
5.5
3.75
Units Conditions
V
mA
V
V
V
mA
μA
ms
s
---
V
NN
= -48.0V
---
---
---
V
GATE
= 1.0V; V
PP
= 11.5V
V
GATE
= 6.0V
---
---
Supply
(Referenced to VPP pin)
UV Control
(Referenced to VNN pin)
Gate Drive Output
(Referenced to VNN pin)
V/ms C
GATE
= 1.0nF
I
GATEDOWN
GATE drive pull-down current (sinking)
Timing Control
(Referenced to VNN pin)
Doc.# DSFP-HV101
B060513
2
Supertex inc.
www.supertex.com
HV101
DC Electrical Characteristics
(cont.)
Sym
Parameter
Min
Typ
Max
Units Conditions
Example Electrical Results
(Using IRF530)
I
LIM
I
LIM
I
LIM
I
SHORT
t
SHORT
Δ
GATE
t
HS
Max inrush current during hotswap
Max inrush current during hotswap
Max inrush current during hotswap
Max current Into a short
Shorted load detect time
Initial rate of rise of GATE
Hotswap period to full GATE value
-
-
-
-
-
-
-
1.4
2.5
3.1
4.0
1.0
2.5
12.5
-
-
-
-
-
-
A
A
A
A
ms
IRF530 external MOSFET,
C
LOAD
= 100μF
IRF530 external MOSFET,
C
LOAD
= 200μF
IRF530 external MOSFET,
C
LOAD
= 300μF
IRF530 external MOSFET,
R
LOAD
= <<1.0
IRF530 external MOSFET,
R
LOAD
= <<1.0
IRF530 external MOSFET, any C
LOAD
V/ms
IRF530 external MOSFET, any C
LOAD
ms
Typical Waveforms
Doc.# DSFP-HV101
B060513
3
Supertex inc.
www.supertex.com
HV101
Functional Description
Insertion into Hot Backplanes
Telecom, data network and some computer applications
require the ability to insert and remove circuit cards from
systems without powering down the entire system. Since all
circuit cards have some filter capacitance on the power rails,
which is especially true in circuit cards or network terminal
equipment utilizing distributed power systems, the insertion
can result in high inrush currents that can cause damage to
connector and circuit cards and may result in unacceptable
disturbances on the system backplane power rails.
The HV101 is designed to facilitate the insertion and removal
of these circuit cards or connection of terminal equipment
by eliminating these inrush currents and powering up these
circuits in a controlled manner after full connector insertion
has been achieved. The HV101 is intended to provide this
control function on the negative supply rail.
After completion of a full POR period, the MOSFET GATE auto-
adapt operation begins. A reference current source is turned
on which begins to charge an internal capacitor generating
a ramp voltage which rises at a slew rate of 2.5V/ms. This
reference slew rate is used by a closed loop system to gener-
ate a GATE output current to drive the GATE of the external
N-channel MOSFET with a slew rate that matches the refer-
ence slew rate. Before the GATE crosses a reference voltage,
which is well below the V
TH
of industry standard MOSFETs,
the pull-up current value is stored and the auto-adapt loop
is opened. This stored pull-up current value is used to drive
the GATE during the remainder of the hotswap period. The
result is a normalization with C
ISS
, which for most MOSFETs
scales with C
RSS
.
The MOSFET GATE is charged with a current source until
it reaches its turn on threshold and starts to charge the load
capacitor. At this point the onset of the Miller Effect causes
the effective capacitance looking into the GATE to rise, and
the current source charging the GATE will have little effect
on the GATE voltage. The GATE voltage remains essentially
constant until the output capacitor is fully charged. At this point
the voltage on the GATE of the MOSFET continues to rise to
a voltage level that guarantees full turn on of the MOSFET.
It will remain in the full on state until an input under voltage
condition is detected.
If the circuit attempts turn on into a shorted load, then the Miller
Effect will not occur. The GATE voltage will continue to rise
essentially at the same rate as the reference ramp indicating
that a short circuit exists. This is detected by the control circuit
and results in turning off the MOSFET initiating a 2.5 second
delay, after which a normal restart is attempted.
If at any time during the start up cycle or thereafter, the input
voltage falls below the UV threshold the GATE output will
be pulled down to V
NN
, turning off the N-channel MOSFET
and all internal circuitry is reset. A normal restart sequence
will be initiated once the input voltage rises above the UVLO
threshold plus hysteresis.
On initial power application the high input voltage internal
regulator seeks to provide a regulated supply for the internal
circuitry. Until the proper internal voltage is achieved all circuits
are held reset by the internal UVLO and the GATE to source
voltage of the external N-channel MOSFET is held off. Once
the internal regulator voltage exceeds the UVLO threshold,
the input undervoltage detection circuit (UV) senses the input
voltage to confirm that it is above the internally programmed
threshold. If at any time the input voltage falls below the UV
threshold, all internal circuitry is reset and the GATE output
is pulled down to V
NN
. UVLO detection works in conjunction
with a power on reset (POR) timer of approximately 3.5ms to
overcome contact bounce. Once the UVLO is satisfied, the
GATE is held to V
NN
until a POR timer expires. Should the UV
monitor toggle before the POR timer expires, the POR timer
will be reset. This process will be repeated each time UVLO
is satisfied until a full POR period has been achieved.
Description of Operation
Doc.# DSFP-HV101
B060513
4
Supertex inc.
www.supertex.com
HV101
Application Information
Hotswap controllers using a MOSFET as the pass element
all include a capacitor divider from VPP to VNN through
C
LOAD
, C
RSS
and C
GS
. In most competitive solutions a large
external capacitor is added to the GATE of the pass element
to limit the voltage on the GATE resulting from this divider. In
those instances, if a GATE capacitor is not used the internal
circuitry is not available to hold off the GATE, and therefore
a fast rising voltage input will cause the pass element to turn
on for a moment. This allows current spikes to pass through
the MOSFET.
The HV101 includes a built-in clamp to ensure that this spuri-
ous current glitch does not occur. The built-in clamp will work
for the time constants of most mechanical connectors. There
may be applications, however, that have rise times that are
much less than 1.0µs (100’s of ns). In these instances it may
be necessary to add a capacitor from the MOSFET GATE to
source to clamp the GATE and suppress this current spike.
In these cases the current spike generally contains very little
energy and does not cause damage even if a capacitor is not
used at the GATE.
Turn On Clamp
Typically if MOSFETs of the same type are used, the hotswap
results will be extremely consistent. If different types are used
they will usually exhibit minimal variation.
Short Circuit Protection
The HV101 provides short circuit protection by shutting down
if the Miller Effect associated with hotswap does not occur.
Specifically, if the output is shorted then the GATE will rise
without exhibiting a “flat response”. Due to the fact that we
have normalized the hotswap period for any pass element, a
timer can be used to detect if the GATE voltage rises above
a threshold within that time, indicating that a short exists. The
diagram below shows a typical turn on sequence with the load
shorted, resulting in a peak current of 4A.
Auto-adapt Operation
The HV101 auto-adapt mechanism provides an important
function. It normalizes the hotswap period regardless of pass
element or load capacitor for consistent hotswap results. By
doing this it allows the novel short circuit mechanism to work
because the mechanism requires a known time base.
The maximum current that may occur during this period can
be controlled by adding a resistor in series with the source of
the MOSFET. The lower graph shows the same circuit with
a 100mΩ
resistor inserted between source and VNN. In this
case the maximum current is 25% smaller.
The above diagram illustrates the effectiveness of the auto-
adapt mechanism. In this example three MOSFETs with dif-
ferent C
ISS
and R
DSON
values are used. The top waveform is
the hotswap current, while the bottom waveform is the GATE
voltage. As can be seen, the hotswap period is normalized,
the initial slope of the GATE voltage is approximately 2.5V/ms
regardless of the MOSFET, and the total hotswap period and
peak currents are a function of a MOSFET type dependent
constant multiplied by C
LOAD
.
For most applications and pass elements, the HV101 provides
adequate limiting of the maximum current to prevent damage
without the need for any external components. The 2.5s delay
of the auto-retry circuit provides time for the pass element to
cool between attempts.
Auto-Retry
Not only does the HV101 provide short circuit protection in a
3-pin package, they also includes a 2.5s built in auto-restart
timer. The HV101 will continuously try to turn on the system
Doc.# DSFP-HV101
B060513
5
Supertex inc.
www.supertex.com
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