HV513
8-Channel Serial to Parallel Converter with High Voltage
Push-Pull Outputs, POL, Hi-Z, and Short Circuit Detect
Features
❑
HVCMOS‚ technology
❑
Operating output voltage of 250V
❑
Low power level shifting from 5V to 250V
❑
Shift register speed 8MHz @ V
DD
=5V
❑
8 latch data outputs
❑
Output polarity and blanking
❑
CMOS compatible inputs
❑
Output short circuit detect
❑
Output high-Z control
General Description
The HV513 is a low voltage serial to high voltage parallel
converter with 8 high voltage push-pull outputs. This device has
been designed to drive small capacitve loads such as piezoelec-
tric transducers. It can also be used in any application requiring
multiple high voltage outputs, with medium current source and
sink capabilities.
The device consists of an 8-bit shift register, 8 latches, and
control logic to perform the polarity select and blanking of the
outputs. Data is shifted through the shift register on the low to
high transition of the clock. A data output buffer is provided for
cascading devices. Operation of the shift register is not affected
by the LE, BL, POL, or the HI-Z control inputs. Transfer of data
from the shift register to the latch occurs when the LE is high. The
data in the latch is stored when LE is low. A high-Z, HI-Z, pin is
provided to set all the outputs in a high-Z state.
All outputs have short circuit protection that detects if the outputs
have reached the required output state. If output does not track
the required state, then the SHORT pin will be low. This output
will pulse low during the output transistion period under normal
operation; see SC Timing Diagram for details.
All outputs will have a break-before-make circuitry to reduce
cross-over current during output state changes.
The POL, BL, LE, and HI-Z inputs have an internal pull up
resistor.
Applications
❏
Piezoelectric transducer driver
❏
Weaving applications
❏
Braille
❏
Printers
❏
MEMs
❏
Displays
Application Diagram
Low Voltage
Power Supply
High Voltage
Power Supply
D
IN
CLK
LE
FPGA
BL
POL
HiZ
Supertex HV513
Low Voltage
Shift Register
Latches
Output
Controller
High Voltage
Level
Translators
&
Push-Pull
Output
Buffers
HV
OUT1
8
/
HV
OUT8
D
OUT
SHORT
Piezo
Element
D
IN
to the next HV513 for cascading the next
A122104
HV513
DC Electrical Characteristics
(Over operating supply voltages unless otherwise noted)
Symbol
I
DD
I
DDQ
I
PP
I
PPQ
I
IH
I
IL
V
OH
V
OL
Parameter
V
DD
supply current
Quiescent V
DD
supply current
V
PP
supply current
Quiescent V
PP
supply current
High-level logic input current
Low-level logic input current
H
VOUT
Data out
H
VOUT
Data out
140
V
DD
-1V
60
1.0
Min
Typ
Max
4
0.1
2.0
100
100
10
-10
-350
Units
mA
mA
µA
µA
µA
µA
Conditions
f
CLK
=8MHz, LE=LOW
All V
IN
=V
DD
All V
IN
=0V
V
PP
=250V, f
OUT
=300Hz, no load
V
PP
=240V, outputs static
V
IH
=V
DD
V
IL
=0V
V
IL
=0V, for inputs w/pull-up resistors
V
PP
=200V, I
HVOUT
=-20mA
I
DOUT
=-0.1mA
V
DD
=4.5V, I
HVOUT
=20mA
I
DOUT
=0.1mA
High-level output
V
Low-level output
V
DC Electrical Characteristics
(Over operating supply voltages unless otherwise noted)
Symbol
f
CLK
f
OUT
t
W
t
SU
t
H
t
WLE
t
DLE
t
SLE
t
OR
, t
OF
t
d ON/OFF
t
DHL
t
DLH
t
R
, t
F
t
SD
t
SC
t
HI-Z
Clock frequency
Output switching frequency (SOA limited)
Clock width high and low
Data setup time before clock rises
Data hold time after clock rises
Width of latch enable pulse
LE delay time after rising edge of clock
LE setup time before rising edge of clock
Rise/fall time of HV
OUT
Delay time for output to star t rise/fall
Delay time clock to D
OUT
high to low
Delay time clock to D
OUT
low to high
All logic inputs
Output shor t circuit detection
Output shor t circuit clear
Output high-Z state
62
15
30
80
35
40
1000
500
110
110
5
500
3000
500
Parameter
Min
0
300
Typ
Max
8
Units
MHz
Hz
ns
ns
ns
ns
ns
ns
µs
ns
ns
ns
ns
ns
ns
ns
Shor t to output fall of SHORT, C
L
=15pF
Shor t clear to output rise of SHORT
C
L
=15pF
C
L
=15pF
C
L
=100nF, V
PP
=200V
C
L
=50nF, V
PP
=200V
Conditions
Absolute Maximum Ratings
1
Supply Voltage, V
DD
Supply Voltage, V
PP
Logic input levels
Ground current
2
High voltage supply current
2
Continuous total power dissipation
3
Operating temperature range
Storage temperature range
1. All voltages are referenced to GND.
2. Connection to all power and ground pads is required. Duty cycle is limited by
the total power dissipated in the package.
3. For operation above 25°C ambient derate linearly to 85°C at 12mW/°C.
Ordering Information
-0.5V to 6V
V
DD
to 275V
Device
HV513
HV513
Part Number
HV513WG
HV513X
Package
24-Lead SOW
Die in Wafer Form
-0.5V to V
DD
+0.5V
0.3A
0.25A
750mW
-40°C to +85°C
-65°C +150°C
A122104
2
HV513
Operating Supply Voltages
Symbol
V
DD
V
PP
V
IH
V
IL
T
A
Notes:
1. Below minimum V
PP
the output may not switch.
2. Power-up sequence should be the following:
1.
2.
3.
4.
Connect ground.
Apply V
DD
.
Set all inputs (Data, CLK, Enable, etc.) to a known state.
Apply V
PP
.
Parameter
Logic supply voltage
High voltage supply
High-level input voltage
Low-level input voltage
Operating free-air temperature
Min
4.5
50
V
DD
-0.9
0
-40
Typ
5.0
Max
5.5
250
V
DD
0.9
+85
Units
V
V
V
V
°C
Note 1
Conditions
Power-down sequence should be the reverse of the above.
Input and Output Equivalent Circuits
V
DD
V
DD
V
PP
20kΩ
*
Data Out
HV
OUT
Input
GND
Logic Inputs
GND
Logic Data Output
HV
GND
High Voltage Outputs
*
POL, BL, LE, and HI-Z
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3
HV513
Switching Waveforms
V
IH
Data Input
50%
t
SU
CLK
50%
t
WL
50%
t
WH
50%
V
OL
Data Out
t
DLH
50%
t
DHL
V
OH
V
OL
Data Valid
t
H
V
IH
50%
50%
V
IL
V
OH
50%
V
IL
LE
t
DLE
50%
t
WLE
50%
t
SLE
V
IH
V
IL
HV
OUT
w/ S/R LOW
t
d
OFF
HV
OUT
w/ S/R HIGH
90%
10%
t
OF
90%
t
OR
V
OH
V
OL
V
OH
V
OL
10%
t
d
ON
Short Circuit Detect Detail Timing (HV513)
LE
POL
BL
V
H
V
L
V
IH
Hi-Z
t
HI-Z
V
OH
HV
OUT
Within
xV of rail
V
IL
V
OL
t
SD
Short
Detect
t
SC
V
H
V
L
Note: For V
PP
greater than 150V:
Short detect output will flag short conditions
- HV
OUT
is higher than 10V when expected low
- HV
OUT
is lower than V
PP
- 100V when expected high
Short detect output will stay clear
- HV
OUT
is lower than 2V when expected low
- HV
OUT
is higher than V
PP
- 60V when expected high
A122104
4
HV513
Functional Block Diagram
POL
BL
LE
V
PP
D
IN
L/T
HV
OUT1
CLK
8-Bit
Static
Shift
Register
8 Latches
6 Additional
Outputs
L/T
HV
OUT8
D
OUT
HI-Z
Short Detect
Short
Function Table
Inputs
Function
All on
All off
Invert mode
Load S/R
Store Data in latches
Data
X
X
X
H or L
X
X
L
H
X
X
X
X
X
X
CLK
X
X
X
LE
X
X
L
L
L
L
H
H
X
X
BL
L
L
H
H
H
H
H
H
X
X
POL
L
H
L
H
H
L
H
H
X
X
HI-Z
H
H
H
H
H
H
H
H
L
H
Shift Reg
1 2…8
* *…*
* *…*
* *…*
H or L *…*
* *…*
* *…*
L *…*
H *…*
* *…*
* *…*
Output
HV Outputs
1 2..8
H H…H
L L… L
* *…* (b)
* *…*
* *…*
* *…* (b)
L *…*
H *…*
High impedance
outputs
Data Out
*
*
*
*
*
*
*
*
*
*
*
Transparent mode
Outputs High-Z
Outputs ON
* *…*
A122104
5
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