NTD4863N
Power MOSFET
25 V, 49 A, Single N−Channel, DPAK/IPAK
Features
•
•
•
•
•
Trench Technology
Low R
DS(on)
to Minimize Conduction Losses
Low Capacitance to Minimize Driver Losses
Optimized Gate Charge to Minimize Switching Losses
These are Pb−Free Devices
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V
(BR)DSS
25 V
14 mW @ 4.5 V
D
R
DS(ON)
MAX
9.3 mW @ 10 V
49 A
I
D
MAX
Applications
•
VCORE Applications
•
DC−DC Converters
•
High Side Switching
MAXIMUM RATINGS
(T
J
= 25°C unless otherwise stated)
Parameter
Drain−to−Source Voltage
Gate−to−Source Voltage
Continuous Drain
Current R
qJA
(Note 1)
Power Dissipation
R
qJA
(Note 1)
Continuous Drain
Current R
qJA
(Note 2)
Power Dissipation
R
qJA
(Note 2)
Continuous Drain
Current R
qJC
(Note 1)
Power Dissipation
R
qJC
(Note 1)
Pulsed Drain
Current
t
p
=10ms
T
A
= 25°C
T
A
= 85°C
T
A
= 25°C
T
A
= 25°C
Steady
State
T
A
= 85°C
T
A
= 25°C
T
C
= 25°C
T
C
= 85°C
T
C
= 25°C
T
A
= 25°C
T
A
= 25°C
P
D
I
DM
I
DmaxPkg
T
J
,
T
STG
I
S
dV/dt
EAS
P
D
I
D
P
D
ID
Symbol
V
DSS
V
GS
I
D
Value
25
±20
11.3
8.8
1.95
9.2
7.1
1.27
49
38
36.6
98
35
−55 to
+175
30.5
6
60.5
W
A
A
°C
A
V/ns
mJ
AYWW
48
63NG
W
A
4
Drain
W
A
1 2
3
DPAK
CASE 369AA
(Bent Lead)
STYLE 2
Unit
V
V
A
4
G
N−Channel
S
4
4
1
1
2 3
2
3
3 IPAK
CASE 369AC
(Straight Lead)
IPAK
CASE 369D
(Straight Lead
DPAK) STYLE 2
MARKING DIAGRAMS
& PIN ASSIGNMENTS
4
Drain
AYWW
48
63NG
4
Drain
Current Limited by Package
Operating Junction and Storage
Temperature
Source Current (Body Diode)
Drain to Source dV/dt
2
1 2 3
Drain 3
1
Gate Drain Source
Gate Source
1 2 3
Gate Drain Source
A
Y
WW
4863N
G
= Assembly Location*
= Year
= Work Week
= Device Code
= Pb−Free Package
Single Pulse Drain−to−Source Avalanche
Energy (T
J
= 25°C, V
DD
= 50 V, V
GS
= 10 V,
I
L
= 11 A
pk
, L = 1.0 mH, R
G
= 25
W)
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
T
L
260
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
* The Assembly Location code (A) is front side
optional. In cases where the Assembly Location is
stamped in the package, the front side assembly
code may be blank.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
©
Semiconductor Components Industries, LLC, 2014
1
August, 2014 − Rev. 3
Publication Order Number:
NTD4863N/D
AYWW
48
63NG
NTD4863N
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter
Junction−to−Case (Drain)
Junction−to−TAB (Drain)
Junction−to−Ambient – Steady State (Note 1)
Junction−to−Ambient – Steady State (Note 2)
1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.
2. Surface−mounted on FR4 board using the minimum recommended pad size.
Symbol
R
qJC
R
qJC−TAB
R
qJA
R
qJA
Value
4.1
3.5
77
118
Unit
°C/W
ELECTRICAL CHARACTERISTICS
(T
J
= 25°C unless otherwise specified)
Parameter
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
Drain−to−Source Breakdown Voltage
Temperature Coefficient
Zero Gate Voltage Drain Current
V
(BR)DSS
V
(BR)DSS
/
T
J
I
DSS
V
GS
= 0 V,
V
DS
= 20 V
T
J
= 25°C
T
J
= 125°C
V
GS
= 0 V, I
D
= 250
mA
25
23
1.0
10
±100
nA
V
mV/°C
mA
Symbol
Test Condition
Min
Typ
Max
Unit
Gate−to−Source Leakage Current
ON CHARACTERISTICS
(Note 3)
Gate Threshold Voltage
Negative Threshold Temperature
Coefficient
Drain−to−Source On Resistance
I
GSS
V
DS
= 0 V, V
GS
=
±20
V
V
GS(TH)
V
GS(TH)
/T
J
R
DS(on)
V
GS
= V
DS
, I
D
= 250
mA
1.45
5.0
2.5
V
mV/°C
V
GS
= 10 V
V
GS
= 4.5 V
I
D
= 30 A
I
D
= 30 A
8.4
12.8
9.3
14
mW
Forward Transconductance
CHARGES AND CAPACITANCES
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
Threshold Gate Charge
Gate−to−Source Charge
Gate−to−Drain Charge
Total Gate Charge
SWITCHING CHARACTERISTICS
(Note 4)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
g
FS
V
DS
= 1.5 V, I
D
= 15 A
S
C
ISS
C
OSS
C
RSS
Q
G(TOT)
Q
G(TH)
Q
GS
Q
GD
Q
G(TOT)
V
GS
= 0 V, f = 1.0 MHz, V
DS
= 12 V
990
253
144
pF
V
GS
= 4.5 V, V
DS
= 15 V, I
D
= 30 A
9.0
1.0
3.4
4.1
13.5
nC
V
GS
= 10 V, V
DS
= 15 V, I
D
= 30 A
17.8
nC
t
d(ON)
t
r
t
d(OFF)
t
f
V
GS
= 4.5 V, V
DS
= 15 V,
I
D
= 15 A, R
G
= 3.0
W
11.5
19.7
13.5
3.6
ns
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Pulse Test: pulse width
≤
300
ms,
duty cycle
≤
2%.
4. Switching characteristics are independent of operating junction temperatures.
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NTD4863N
ELECTRICAL CHARACTERISTICS
(T
J
= 25°C unless otherwise specified) (continued)
Parameter
SWITCHING CHARACTERISTICS
(Note 4)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
SD
V
GS
= 0 V,
I
S
= 30 A
T
J
= 25°C
T
J
= 125°C
0.96
0.83
10.9
5.4
5.5
2.7
nC
ns
1.2
V
t
d(ON)
t
r
t
d(OFF)
t
f
V
GS
= 11.5 V, V
DS
= 15 V,
I
D
= 15 A, R
G
= 3.0
W
7.0
16.5
20.2
2.0
ns
Symbol
Test Condition
Min
Typ
Max
Unit
Reverse Recovery Time
Charge Time
Discharge Time
Reverse Recovery Charge
PACKAGE PARASITIC VALUES
Source Inductance
Drain Inductance, DPAK
Drain Inductance, IPAK
Gate Inductance
Gate Resistance
t
RR
t
a
t
b
Q
RR
V
GS
= 0 V, dIS/dt = 100 A/ms,
I
S
= 30 A
L
S
L
D
L
D
L
G
R
G
T
A
= 25°C
2.49
0.0164
1.88
3.46
0.5
nH
W
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Pulse Test: pulse width
≤
300
ms,
duty cycle
≤
2%.
4. Switching characteristics are independent of operating junction temperatures.
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NTD4863N
TYPICAL PERFORMANCE CURVES
60
10V
I
D
, DRAIN CURRENT (AMPS)
50
40
3.6 V
30
20
10
0
3.4 V
3.2 V
3.0 V
2.8 V
0
1
2
3
4
5
0
0
1
2
3
4.2 V
60
4V
I
D
, DRAIN CURRENT (AMPS)
50
40
30
20
10
3.8 V
V
DS
≥
10 V
T
J
= 25°C
T
J
= 125°C
T
J
= 25°C
T
J
= −55°C
4
5
V
DS
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
V
GS
, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 1. On−Region Characteristics
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (W)
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (W)
Figure 2. Transfer Characteristics
0.04
I
D
= 30 A
T
J
= 25°C
0.03
0.020
0.018
0.016
0.014
0.012
0.010
0.008
0.006
0.004
0.002
0
10
20
30
40
50
60
V
GS
= 11.5 V
V
GS
= 4.5 V
T
J
= 25°C
0.02
0.01
0
2
3
4
5
6
7
8
9
10
11
V
GS
, GATE−TO−SOURCE VOLTAGE (VOLTS)
I
D
, DRAIN CURRENT (AMPS)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE
(NORMALIZED)
1.8
1.6
1.4
1.2
1.0
0.8
0.6
−50
10
−25
0
25
50
75
100
125
150
175
5
I
D
= 30 A
V
GS
= 10 V
I
DSS
, LEAKAGE (nA)
1000
10000
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
V
GS
= 0 V
T
J
= 150°C
100
T
J
= 125°C
10
15
20
25
T
J
, JUNCTION TEMPERATURE (°C)
V
DS
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Drain Voltage
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NTD4863N
TYPICAL PERFORMANCE CURVES
1200
C
iss
1000
C, CAPACITANCE (pF)
800
600
C
oss
400
200
C
rss
0
0
5
10
15
20
25
V
GS
= 0 V
T
J
= 25°C
10
Q
T
8
VGS , GATE−TO−SOURCE VOLTAGE (VOLTS)
6
Q
1
4
Q
2
V
GS
2
I
D
= 30 A
T
J
= 25°C
0
0
2
4
6
8
10
12
14
16
20
Q
G
, TOTAL GATE CHARGE (nC)
DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 7. Capacitance Variation
Figure 8. Gate−To−Source and Drain−To−Source
Voltage vs. Total Charge
30
IS, SOURCE CURRENT (AMPS)
1000
V
DD
= 15 V
I
D
= 30 A
V
GS
= 11.5 V
t, TIME (ns)
100
V
GS
= 0 V
25
20
15
10
5
0
0.2
T
J
= 25°C
t
r
t
d(off)
10
t
d(on)
t
f
1
1
10
R
G
, GATE RESISTANCE (OHMS)
100
0.4
0.6
0.8
1.0
V
SD
, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 9. Resistive Switching Time
Variation vs. Gate Resistance
EAS, SINGLE PULSE DRAIN−TO−SOURCE
AVALANCHE ENERGY (mJ)
1000
I D, DRAIN CURRENT (AMPS)
60
Figure 10. Diode Forward Voltage vs. Current
I
D
= 11 A
50
40
30
20
10
0
25
50
75
100
125
150
175
100
10
ms
10
V
GS
= 20 V
SINGLE PULSE
T
C
= 25°C
R
DS(on)
LIMIT
THERMAL LIMIT
PACKAGE LIMIT
1
10
100
V
DS
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
100
ms
1 ms
10 ms
dc
1
0.1
0.1
T
J
, JUNCTION TEMPERATURE (°C)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
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