MMBFJ177LT1G,
SMMBFJ177LT1G
JFET Chopper
P−Channel − Depletion
Features
www.onsemi.com
2 SOURCE
•
S Prefix for Automotive and Other Applications Requiring Unique
Site and Control Change Requirements; AEC−Q101 Qualified and
PPAP Capable
•
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
3
GATE
1 DRAIN
MAXIMUM RATINGS
Rating
Drain−Gate Voltage
Gate−Source Voltage
Symbol
V
DG
V
GS
Value
−25
25
Unit
Vdc
Vdc
1
2
3
SOT−23 (TO−236AB)
CASE 318−08
STYLE 10
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
MARKING DIAGRAM
THERMAL CHARACTERISTICS
Total Device Dissipation FR− 5 Board
(Note 1)
T
A
= 25°C
Derate above 25°C
Thermal Resistance,
Junction−to−Ambient
Junction and Storage Temperature
1. FR− 5 = 1.0
0.75
0.062 in.
P
D
225
1.8
R
qJA
T
J
, T
stg
556
−55 to +150
mW
mW/°C
°C/W
°C
1
6Y = Specific Device Code
M = Date Code*
G
= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation and/or overbar may
vary depending upon manufacturing location.
6Y MG
G
ORDERING INFORMATION
Device
MMBFJ177LT1G
SMMBFJ177LT1G
Package
SOT−23
(Pb−Free)
SOT−23
(Pb−Free)
Shipping
†
3000 / Tape &
Reel
3000 / Tape &
Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
©
Semiconductor Components Industries, LLC, 2015
1
January, 2015 − Rev. 7
Publication Order Number:
MMBFJ177LT1/D
MMBFJ177LT1G, SMMBFJ177LT1G
ELECTRICAL CHARACTERISTICS
(T
A
= 25°C unless otherwise noted)
Characteristic
Symbol
Min
Max
Unit
OFF CHARACTERISTICS
Gate−Source Breakdown Voltage (V
DS
= 0, I
D
= 1.0
mAdc)
Gate Reverse Current (V
DS
= 0 Vdc, V
GS
= 20 Vdc)
Gate Source Cutoff Voltage (V
DS
= −15 Vdc, I
D
= −10 nAdc)
V
(BR)GSS
I
GSS
V
GS(off)
30
−
0.8
−
1.0
2.5
Vdc
nAdc
Vdc
ON CHARACTERISTICS
Zero−Gate−Voltage Drain Current (V
GS
= 0, V
DS
= −15 Vdc) (Note 2)
Drain Cutoff Current (V
DS
= −15 Vdc, V
GS
= 10 Vdc)
Drain Source On Resistance (I
D
= −500
mAdc)
Input Capacitance
Reverse Transfer Capacitance
V
DS
= 0, V
GS
= 10 Vdc
f = 1.0 MHz
I
DSS
I
D(off)
r
DS(on)
C
iss
C
rss
−1.5
−
−
−
−
−20
−1.0
300
11
5.5
mAdc
nAdc
W
pF
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
2. Pulse Test: Pulse Width < 300
ms,
Duty Cycle
≤
2%.
TYPICAL CHARACTERISTICS
−8
VGS = 0 V
−6
−5
−4
−3
VGS = 0.7 V
−2
−1
0
0
−2
−4
−6
−8
−10
−12
V
DS
, DRAIN−SOURCE VOLTAGE (V)
VGS = 0.9 V
VGS = 0.5 V
C
rss
, REVERSE TRANSFER
CAPACITANCE (pF)
−7
I
D
, DRAIN CURRENT (mA)
VGS = 0.1 V
VGS = 0.3 V
12
10
8
6
4
2
0
0
−5
−10
−15
−20
−25
V
DS
, DRAIN−SOURCE VOLTAGE (V)
14
V
GS
= 0 V
f = 1 MHz
Figure 1. Drain Current vs. Drain−Source
Voltage
32
C
iss
, INPUT CAPACITANCE (pF)
28
24
20
16
12
8
4
0
0
−5
−10
−15
Figure 2. Reverse Transfer Capacitance
V
GS
= 0 V
f = 1 MHz
−20
−25
V
DS
, DRAIN−SOURCE VOLTAGE (V)
Figure 3. Input Capacitance
www.onsemi.com
2
MMBFJ177LT1G, SMMBFJ177LT1G
PACKAGE DIMENSIONS
SOT−23 (TO−236AB)
CASE 318−08
ISSUE AP
D
SEE VIEW C
3
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH
THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM
THICKNESS OF BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS.
DIM
A
A1
b
c
D
E
e
L
L1
H
E
q
MIN
0.89
0.01
0.37
0.09
2.80
1.20
1.78
0.10
0.35
2.10
0
°
MILLIMETERS
NOM
MAX
1.00
1.11
0.06
0.10
0.44
0.50
0.13
0.18
2.90
3.04
1.30
1.40
1.90
2.04
0.20
0.30
0.54
0.69
2.40
2.64
−−−
10
°
MIN
0.035
0.001
0.015
0.003
0.110
0.047
0.070
0.004
0.014
0.083
0
°
INCHES
NOM
0.040
0.002
0.018
0.005
0.114
0.051
0.075
0.008
0.021
0.094
−−−
MAX
0.044
0.004
0.020
0.007
0.120
0.055
0.081
0.012
0.029
0.104
10
°
E
HE
c
1
2
b
e
q
A
L
A1
L1
VIEW C
0.25
STYLE 10:
PIN 1. DRAIN
2. SOURCE
3. GATE
SOLDERING FOOTPRINT*
0.95
0.037
0.95
0.037
2.0
0.079
0.9
0.035
0.8
0.031
SCALE 10:1
mm
inches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor
and
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particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without
limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications
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does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for
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3
MMBFJ177LT1/D