Continuous Source Current (MOSFET Diode Conduction)
a
Average Forward Current (Schottky)
Pulsed Forward Current (Schottky)
Maximum Power Dissipation (MOSFET)
a
Maximum Power Dissipation (Schottky)
a
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak
Temperature)
b, c
T
A
= 25 °C
T
A
= 85 °C
T
A
= 25 °C
T
A
= 85 °C
T
J
, T
stg
P
D
T
A
= 25 °C
T
A
= 85 °C
Symbol
V
DS
V
KA
V
GS
I
D
I
DM
I
S
I
F
I
FM
2.1
1.1
1.3
0.68
- 55 to 150
260
- 1.8
1.0
7
1.1
0.6
0.96
0.59
°C
W
±8
- 3.6
- 2.6
- 10
- 0.9
5s
- 20
20
±8
- 2.7
- 1.9
A
Steady State
Unit
V
V
Notes:
a. Surface mounted on 1" x 1" FR4 board.
b. See reliability manual for profile. The ChipFET is a leadless package. The end of the lead terminal is exposed copper (not plated) as a result
of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not required to ensure
adequate bottom side solder interconnection.
c. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components.
Document Number: 71239
S10-0547-Rev. D, 08-Mar-10
www.vishay.com
1
Si5853DC
Vishay Siliconix
THERMAL RESISTANCE RATINGS
Parameter
t
≤
5s
Junction-to-Ambient
a
Steady State
Junction-to-Foot
Notes:
a. Surface mounted on 1" x 1" FR4 board.
Steady State
Device
MOSFET
Schottky
MOSFET
Schottky
MOSFET
Schottky
R
thJF
R
thJA
Symbol
Typical
50
77
90
110
30
33
Maximum
60
95
110
130
40
40
°C/W
Unit
MOSFET SPECIFICATIONS
T
J
= 25 °C, unless otherwise noted
Parameter
Static
Gate Threshold Voltage
Gate-Body Leakage
Zero Gate Voltage Drain Current
On-State Drain Current
a
Drain-Source On-State Resistance
a
Forward Transconductance
a
Diode Forward Voltage
a
Dynamic
b
Symbol
V
GS(th)
I
GSS
I
DSS
I
D(on)
R
DS(on)
g
fs
V
SD
Q
g
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
t
rr
Test Conditions
V
DS
= V
GS
, I
D
= - 250 µA
V
DS
= 0 V, V
GS
= ± 8 V
V
DS
= - 20 V, V
GS
= 0 V
V
DS
= - 20 V, V
GS
= 0 V, T
J
= 85 °C
V
DS
≤ −
5 V, V
GS
= - 4.5 V
V
GS
= - 4.5 V, I
D
= - 2.7 A
V
GS
= - 2.5 V, I
D
= - 2.2 A
V
GS
= - 1.8 V, I
D
= - 1 A
V
DS
= - 10 V, I
D
= - 2.7 A
I
S
= - 0.9 A, V
GS
= 0 V
Min.
- 0.45
Typ.
Max.
- 1.0
± 100
-1
-5
Unit
V
nA
µA
A
- 10
0.095
0.137
0.205
7
- 0.8
5.1
- 1.2
7.7
0.110
0.160
0.240
Ω
S
V
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Source-Drain Reverse Recovery Time
V
DS
= - 10 V, V
GS
= - 4.5 V, I
D
= - 2.7 A
1.2
1.0
16
25
45
45
40
40
nC
V
DD
= - 10 V, R
L
= 10
Ω
I
D
≅
- 1 A, V
GEN
= - 4.5 V, R
g
= 6
Ω
I
F
= - 0.9 A, dI/dt = 100 A/µs
30
30
27
20
ns
Notes:
a. Pulse test; pulse width
≤
300 µs, duty cycle
≤
2 %.
b. Guaranteed by design, not subject to production testing.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
stm32/stm8
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