NTB0104-Q100
Dual supply translating transceiver; auto direction sensing;
3-state
Rev. 2 — 18 April 2013
Product data sheet
1. General description
The NTB0104-Q100 is a 4-bit, dual supply translating transceiver with auto direction
sensing, that enables bidirectional voltage level translation. It features two 4-bit
input-output ports (An and Bn), one output enable input (OE) and two supply pins (V
CC(A)
and V
CC(B)
). V
CC(A)
can be supplied with any voltage between 1.2 V and 3.6 V. V
CC(B)
can
be supplied with any voltage between 1.65 V and 5.5 V. The range of supply voltages
makes the device suitable for translating between any of the low voltage nodes (1.2 V, 1.5
V, 1.8 V, 2.5 V, 3.3 V and 5.0 V).
Pins An and OE are referenced to V
CC(A)
and pins Bn are referenced to V
CC(B)
. A LOW
level at pin OE causes the outputs to assume a high-impedance OFF-state. This device is
fully specified for partial power-down applications using I
OFF
. The I
OFF
circuitry disables
the output, preventing the damaging backflow current through the device when it is
powered down.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from
40 C
to +85
C
and from
40 C
to +125
C
Wide supply voltage range:
V
CC(A)
: 1.2 V to 3.6 V and V
CC(B)
: 1.65 V to 5.5 V
I
OFF
circuitry provides partial Power-down mode operation
Inputs accept voltages up to 5.5 V
ESD protection:
MIL-STD-883, method 3015 Class 2 exceeds 2500 V for A port
MIL-STD-883, method 3015 Class 3B exceeds 15000 V for B port
HBM JESD22-A114E Class 2 exceeds 2500 V for A port
HBM JESD22-A114E Class 3B exceeds 15000 V for B port
MM JESD22-A115-A exceeds 200 V (C = 200 pf, R = 0
)
Latch-up performance exceeds 100 mA per JESD 78B Class II
Multiple package options
NXP Semiconductors
NTB0104-Q100
Dual supply translating transceiver; auto direction sensing; 3-state
3. Ordering information
Table 1.
Ordering information
Package
Temperature
range
Name
Description
Version
Type number
NTB0104BQ-Q100
40 C
to +125
C
DHVQFN14 plastic dual in-line compatible thermal enhanced SOT762-1
very thin quad flat package; no leads;
14 terminals; body 2.5
3
0.85 mm
NTB0104UK-Q100
40 C
to +125
C
WLCSP12
wafer level chip-size package, 12 bumps;
NTB0104UK-Q100
body 1.20
1.60
0.56 mm. (Backside Coating
included)
4. Marking
Table 2.
Marking
Marking code
B0104
t04
Type number
NTB0104BQ-Q100
NTB0104UK-Q100
5. Functional diagram
OE
A1
B1
A2
B2
A3
B3
A4
B4
V
CC(A)
V
CC(B)
001aam795
Fig 1.
Logic symbol
NTB0104_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 18 April 2013
2 of 23
NXP Semiconductors
NTB0104-Q100
Dual supply translating transceiver; auto direction sensing; 3-state
6. Pinning information
6.1 Pinning
17%4
9
*1'
WHUPLQDO
LQGH[ DUHD
$
$
$
$
QF
9
%
%
%
%
QF
2(
DDD
7UDQVSDUHQW WRS YLHZ
(1) This is not a supply pin, the substrate is attached to this pad using conductive die attach material. There is no electrical or
mechanical requirement to solder this pad, however if it is soldered the solder land should remain floating or be connected to
GND
Fig 2.
Pin configuration DHVQFN14 (SOT762-1)
17%4
$
%
9
$
*1'
EDOO $
LQGH[ DUHD
$
17%4
%
%
9
$
%
&
%
2(
$
&
'
%
*1'
$
'
7UDQVSDUHQW WRS YLHZ
DDD
7UDQVSDUHQW WRS YLHZ
DDD
Fig 3.
Pin configuration WLCSP12 package
Fig 4.
Ball mapping for WLCSP12
6.2 Pin description
Table 3.
Symbol
V
CC(A)
A1, A2, A3, A4
n.c.
Pin description
Pin
SOT762-1
1
2, 3, 4, 5
6, 9
Ball
WLCSP12
B2
A3, B3, C3, D3
-
supply voltage A
data input or output (referenced to V
CC(A)
)
not connected
Description
NTB0104_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 18 April 2013
3 of 23
NXP Semiconductors
NTB0104-Q100
Dual supply translating transceiver; auto direction sensing; 3-state
Table 3.
Symbol
GND
OE
Pin description
…continued
Pin
SOT762-1
7
8
10, 11, 12, 13
14
Ball
WLCSP12
D2
C2
D1, C1, B1, A1
A2
ground (0 V)
output enable input (active HIGH; referenced to V
CC(A)
)
data input or output (referenced to V
CC(B)
)
supply voltage B
Description
B4, B3, B2, B1
V
CC(B)
7. Functional description
Table 4.
V
CC(A)
1.2 V to V
CC(B)
1.2 V to V
CC(B)
GND
[2]
[1]
[2]
Function table
[1]
Input
V
CC(B)
1.65 V to 5.5 V
1.65 V to 5.5 V
GND
[2]
OE
L
H
X
Input/output
An
Z
input or output
Z
Bn
Z
output or input
Z
Supply voltage
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
When either V
CC(A)
or V
CC(B)
is at GND level, the device goes into power-down mode.
8. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC(A)
V
CC(B)
V
I
V
O
I
IK
I
OK
I
O
I
CC
I
GND
T
stg
P
tot
[1]
[2]
[3]
[4]
Parameter
supply voltage A
supply voltage B
input voltage
output voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
Conditions
Min
0.5
0.5
[1]
Max
+6.5
+6.5
+6.5
V
CCO
+ 0.5
+6.5
-
-
50
100
-
+150
250
Unit
V
V
V
V
V
mA
mA
mA
mA
mA
C
mW
0.5
0.5
0.5
50
50
Active mode
Power-down or 3-state mode
V
I
< 0 V
V
O
< 0 V
V
O
= 0 V to V
CCO
I
CC(A)
or I
CC(B)
[1][2][3]
[1]
[2]
-
-
100
65
T
amb
=
40 C
to +125
C
[4]
-
The minimum input and minimum output voltage ratings may be exceeded if the input and output current ratings are observed.
V
CCO
is the supply voltage associated with the output.
V
CCO
+ 0.5 V should not exceed 6.5 V.
For DHVQFN14 packages: above 60
C
the value of P
tot
derates linearly with 4.5 mW/K.
NTB0104_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 18 April 2013
4 of 23
NXP Semiconductors
NTB0104-Q100
Dual supply translating transceiver; auto direction sensing; 3-state
9. Recommended operating conditions
Table 6.
Symbol
V
CC(A)
V
CC(B)
V
I
V
O
Recommended operating conditions
[1][2]
Parameter
supply voltage A
supply voltage B
input voltage
output voltage
Power-down or 3-state mode;
V
CC(A)
= 1.2 V to 3.6 V;
V
CC(B)
= 1.65 V to 5.5 V
A port
B port
T
amb
t/V
ambient temperature
input transition rise and fall rate
V
CC(A)
= 1.2 V to 3.6 V;
V
CC(B)
= 1.65 V to 5.5 V
0
0
40
-
3.6
5.5
+125
40
V
V
C
ns/V
Conditions
Min
1.2
1.65
0
Max
3.6
5.5
5.5
Unit
V
V
V
[1]
[2]
Hold the A and B sides of an unused I/O pair in the same state, either both at V
CCI
or both at GND.
V
CC(A)
must be less than or equal to V
CC(B)
.
10. Static characteristics
Table 7.
Typical static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V); T
amb
= 25
C.
Symbol Parameter
V
OH
V
OL
I
I
I
OZ
I
OFF
HIGH-level
output voltage
LOW-level
output voltage
input leakage
current
Conditions
A port; V
CC(A)
= 1.2 V; I
O
=
20 A
A port; V
CC(A)
= 1.2 V; I
O
= 20
A
OE input; V
I
= 0 V to 3.6 V; V
CC(A)
= 1.2 V to 3.6 V;
V
CC(B)
= 1.65 V to 5.5 V
[1]
Min
-
-
-
-
-
-
[2]
Typ
1.1
0.09
-
-
-
-
Max
-
-
1
1
1
1
Unit
V
V
A
A
A
A
OFF-state output A or B port; V
O
= 0 V to V
CCO
; V
CC(A)
= 1.2 V to 3.6 V;
current
V
CC(B)
= 1.65 V to 5.5 V
power-off
leakage current
A port; V
I
or V
O
= 0 V to 3.6 V;
V
CC(A)
= 0 V; V
CC(B)
= 0 V to 5.5 V
B port; V
I
or V
O
= 0 V to 5.5 V;
V
CC(B)
= 0 V; V
CC(A)
= 0 V to 3.6 V
I
CC
supply current
V
I
= 0 V or V
CCI
; I
O
= 0 A
I
CC(A)
; V
CC(A)
= 1.2 V; V
CC(B)
= 1.65 V to 5.5 V
I
CC(B)
; V
CC(A)
= 1.2 V; V
CC(B)
= 1.65 V to 5.5 V
I
CC(A)
+ I
CC(B)
; V
CC(A)
= 1.2 V; V
CC(B)
= 1.65 V to 5.5 V
-
-
-
-
-
-
0.05
3.3
3.5
2.8
4.0
7.5
-
-
-
-
-
-
A
A
A
pF
pF
pF
C
I
C
I/O
input
capacitance
input/output
capacitance
OE input; V
CC(A)
= 1.2 V to 3.6 V; V
CC(B)
= 1.65 V to 5.5 V
A port; V
CC(A)
= 1.2 V to 3.6 V; V
CC(B)
= 1.65 V to 5.5 V
B port; V
CC(A)
= 1.2 V to 3.6 V; V
CC(B)
= 1.65 V to 5.5 V
[1]
[2]
V
CCO
is the supply voltage associated with the output.
V
CCI
is the supply voltage associated with the input.
NTB0104_Q100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 18 April 2013
5 of 23
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