Operating Temperature Range ........................ -40NC to +125NC
Junction Temperature .....................................................+150NC
Lead Temperature (soldering, 10s) ................................+300NC
Soldering Temperature (reflow) ......................................+260NC
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional opera-
tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
PACKAGE THERMAL CHARACTERISTICS (Note 1)
SC70
Junction-to-Ambient Thermal Resistance (B
JA
) .... 326.5NC/W
Junction-to-Case Thermal Resistance (B
JC
) .............115NC/W
SOT23
Junction-to-Ambient Thermal Resistance (B
JA
) .... 255.9NC/W
Junction-to-Case Thermal Resistance (B
JC
) ...............81NC/W
Thin µDFN (Ultra-Thin LGA)
Junction-to-Ambient Thermal Resistance (B
JA
) ....... 470NC/W
Note 1:
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to
www.maximintegrated.com/thermal-tutorial.
ELECTRICAL CHARACTERISTICS
(V
DD
= 3.3V, V
SS
= 0V, V
IN+
= V
IN-
= V
DD
/2, RL = 10kI to V
DD
/2, V
CAL
= V
SHDN
= V
DD
, T
A
= -40NC to +125NC. Typical values are
at T
A
= +25NC, unless otherwise noted.) (Note 2)
PARAMETER
DC CHARACTERISTICS
Input Voltage Range
V
IN+
V
IN-
Guaranteed by CMRR test
T
A
= +25NC
Input Offset Voltage (Note 3)
V
OS
T
A =
-40°C to +125°C after calibration
T
A
= -40°C to
+125°C
MAX44260/MAX44261
MAX44259/MAX44263
0.8
1
0.01
0.01
-0.1
10
V
DD
+ 0.1
50
100
500
800
5
8
0.5
0.5
10
100
160
0.4
V
CM
= -0.1V to (V
DD
+ 0.1V)
Common mode
Differential mode
Maxim Integrated
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
V
FV
Input Offset Voltage Drift
(Note 3)
V
OS
- TC
MAX44260/MAX44261
MAX44259/MAX44263
T
A
= +25NC
MAX44259/
MAX44260/MAX44261
MAX44263
FV/NC
Input Bias Current (Note 3)
I
B
T
A
= -40NC to +85NC
T
A
= -40NC to
+125NC
MAX44259/
MAX44260/MAX44261
MAX44263
75
90
10
11
10
12
pA
Input Capacitance
Common-Mode Rejection Ratio
Input Resistance
C
IN
CMRR
R
IN
V
CM
= -0.1V to
(V
DD
+ 0.1V)
pF
dB
Ω
2
MAX44259/MAX44260/MAX44261/MAX44263
1.8V, 15MHz Low-Offset,
Low-Power, Rail-to-Rail I/O Op Amps
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 3.3V, V
SS
= 0V, V
IN+
= V
IN-
= V
DD
/2, RL = 10kI to V
DD
/2, V
CAL
= V
SHDN
= V
DD
, T
A
= -40NC to +125NC. Typical values are
at T
A
= +25NC, unless otherwise noted.) (Note 2)
PARAMETER
SYMBOL
0.4V
P
V
OUT
P
V
DD
- 0.4V,
R
OUT
= 10kI
Open-Loop Gain
A
OL
0.4V
P
V
OUT
P
V
DD
- 0.4V,
R
OUT
= 600I
To V
DD
or V
SS
R
OUT
= 10kI
R
OUT
= 600I
R
OUT
= 32I
R
OUT
= 10kI
V
DD
-
V
OH
MAX44259/
MAX44260/MAX44261
MAX44263
R
OUT
= 600I
R
OUT
= 32I
AC CHARACTERISTICS
Input Voltage-Noise Density
Input Current-Noise Density
Gain-Bandwidth Product
Slew Rate
Settling Time
Capacitive Loading
Total Harmonic Distortion
Output Transient Recovery Time
POWER-SUPPLY CHARACTERISTICS
Power-Supply Range
V
DD
Guaranteed by PSRR
T
A
= 0NC to +70NC
V
CM
= V
DD
/2
MAX44259/MAX44260/
MAX44261
MAX44263
1.8
1.7
82
76
95
95
5.5
5.5
V
C
LOAD
THD
e
n
i
n
GBWP
SR
V
OUT
= 2V
P-P
, V
DD
= 3.3V, A
V
= 1V/V,
C
L
= 30pF (load), settle to 0.01%
No sustained oscillation
f = 10kHz, V
O
= 2V
P-P
, A
V
= 1, R
OUT
= 10kI
DV
OUT
= 0.2V, V
DD =
3.3V
,
A
V =
1V/V;
R
S
= 20Ω, C
L
= 1nF (load)
f = 10kHz
f = 10kHz
12.7
1.2
15
7
1.7
300
-110
1
nV/√Hz
fA/√Hz
MHz
V/Fs
µs
pF
dB
µs
MAX44259/
MAX44260/MAX44261
MAX44263
400
400
CONDITIONS
MAX44259/
MAX44260/MAX44261
MAX44263
MAX44259/
MAX44260/MAX44261
MAX44263
MIN
100
97
91
86
TYP
115
115
100
100
80
50
20
50
700
10
10
40
50
800
mV
mA
dB
MAX
UNITS
0.4V
P
V
OUT
P
V
DD
- 0.4V, R
OUT
= 32I
Output Short-Circuit Current
I
SC
V
OL
-
V
SS
Output Voltage Swing
Power-Supply Rejection Ratio
PSRR
dB
Maxim Integrated
3
MAX44259/MAX44260/MAX44261/MAX44263
1.8V, 15MHz Low-Offset,
Low-Power, Rail-to-Rail I/O Op Amps
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 3.3V, V
SS
= 0V, V
IN+
= V
IN-
= V
DD
/2, RL = 10kI to V
DD
/2, V
CAL
= V
SHDN
= V
DD
, T
A
= -40NC to +125NC. Typical values are
at T
A
= +25NC, unless otherwise noted.) (Note 2)
PARAMETER
Quiescent Current
Shutdown Supply Current
Shutdown Input Low
Shutdown Input High
Output Leakage Current in
Shutdown
Shutdown Input Bias Current
Shutdown Turn-On Time
(Note 4)
Turn-On Time (Note 4)
SYMBOL
I
DD
I
SHDN
V
IL
V
IH
I
SHDN
I
IL
/I
IH
t
SHDN
t
ON
CONDITIONS
MAX44259/MAX44260/MAX44261
MAX44263 (per amplifier)
(Note 4)
(Note 4)
(Note 4)
(Note 4)
MAX44260
MAX44261
T
A
= +25NC (Note 3)
T
A =
-40°C to +125°C (Note 3)
T
A
= +25NC (Note 3)
T
A =
-40°C to +125°C (Note 3)
9.7
14.4
1.3
100
1
0.1
18.9
26.7
15.2
18.4
MIN
TYP
750
650
MAX
1200
1100
1
0.5
UNITS
µA
µA
V
V
pA
µA
µs
ms
Note 2:
All devices are 100% production tested at T
A
= +25NC. Temperature limits are guaranteed by design.
Note 3:
Guaranteed by design.
Note 4:
MAX44259/MAX44260/MAX44261 only.
Typical Operating Characteristics
(V
DD
= 3.3V, V
SS
= 0V, V
IN+
= V
IN-
= V
DD
/2, R
L
= 10kI to V
DD
/2, V
CAL
= V
SHDN
= V
DD
, T
A
= -40NC to +125NC. Typical values are at
T
A
= +25NC, unless otherwise noted. All devices are 100% production tested at T
A
= +25NC. Temperature limits are guaranteed by design.)
INPUT OFFSET VOLTAGE
vs. COMMON-MODE VOLTAGE
MAX44260 toc01
INPUT OFFSET VOLTAGE
vs. SUPPLY VOLTAGE
80
INPUT OFFSET VOLTAGE (µV)
60
40
20
0
-20
-40
-60
-80
3.5
-100
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
SUPPLY VOLTAGE (V)
0
T
A
= +125°C
T
A
= +25°C
T
A
= -40°C
MAX44260 toc02
INPUT V
OS
HISTOGRAM
MAX44260 toc03
60
40
20
0
-20
-40
-60
-0.5
0
0.5
1.0
1.5
2.0
T
A
= +25°C
T
A
= +125°C
2.5
3.0
T
A
= -40°C
100
25
20
15
10
5
INPUT OFFSET VOLTAGE (µV)
PERCENT OCCURRENCE (%)
-15 -10
-5
0
5
10
15
20
25
COMMON-MODE VOLTAGE (V)
INPUT OFFSET VOLTAGE (µV)
Maxim Integrated
4
MAX44259/MAX44260/MAX44261/MAX44263
1.8V, 15MHz Low-Offset,
Low-Power, Rail-to-Rail I/O Op Amps
Typical Operating Characteristics (continued)
(V
DD
= 3.3V, V
SS
= 0V, V
IN+
= V
IN-
= V
DD
/2, R
L
= 10kI to V
DD
/2, V
CAL
= V
SHDN
= V
DD
, T
A
= -40NC to +125NC. Typical values are at
T
A
= +25NC, unless otherwise noted. All devices are 100% production tested at T
A
= +25NC. Temperature limits are guaranteed by design.)
在全球半导体产业因景气不佳而纷传并购、整合之际,两大IT巨头三星、IBM日前却双双宣布,将强化半导体产业投资。 三星电子本周一宣布,已向韩国证券交易所提交一份申请文件,打算2008年投下10.5亿美元,用于升级内存芯片生产线、改进技术工艺,从而提高产能并降低成本。无独有偶。本周二IBM公司宣布,未来3年将投资10亿美元,用于扩充位于纽约州 East Fishkill 的半导体工厂,以消...[详细]
复杂 IC 不仅吸引了更多系统,而且还吞食着设计者用于建立、评估与校准芯片的测试设备。 芯片设计者正开始在自己的复杂 IC上设计测试与测量仪器。在IC中设计测试仪器的潮流开始于CPU核心与总线的数字调试硬件。现在,设计者也在高速I/O块中建立分析仪器。设计者正在高频芯片的内部作业中集成更复杂的模拟与RF测试仪器,如读取通道IC。 这只是尺度问题。随着系统级 IC 越来越大而复杂...[详细]