CMX018
UHF FM/FSK Receiver
D/018/3 April 1999
Advance Information
Features
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•
•
•
•
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Applications
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•
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•
•
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Double Conversion Super-Heterodyne
Receiver and FM/FSK Demodulator
LNA with Switched Gain
High Performance UHF Down-Converter
Stage with Integrated VCO
2.7V Operation
Zero-Power Mode (<10
µ
A)
28-Pin SSOP Package
Temperature Compensated RSSI
High Performance Analogue/Digital
Radio Links (860-965MHz)
General ISM 915MHz Band
Analogue/Digital Cordless Phones
Spread Spectrum Receivers
Analogue FM Receivers
Handheld Data Terminals
So-Ho Wireless Data Links
GAINSEL
TANK
OSCOUT
OSCBA
OSCEM
ENABLE
RSSI
BUFFERED
OSCILLATOR
OUTPUT
BANDGAP
& BIAS
CONTROL
2nd DOWN
CONVERTER
1st DOWN
CONVERTER
LNAIN
50Ω
Ω
Ω
50Ω
VCO
IF LIMITING
AMPLIFIER
FM/FSK
DISCRIMINATOR
LNA
DETOUT
Ω
50Ω
Ω
100Ω
Ω
100Ω
Ω
430Ω
430Ω
Ω
LNADEC
LNAOUT
MIX1IN
MIX1OUT
MIX2IN
MIX2OUT
LIMIN
LIMDEC1 LIMDEC2
LIMOUT
QUADIN
1.1
Brief Description
The CMX018 is a single chip UHF FM/FSK double-conversion super-heterodyne receiver. It combines
a dual gain mode Low Noise Amplifier (LNA), two down-converters (including integrated oscillators),
limiting amplifier, RSSI, FM/FSK demodulator and zero-power mode control.
The CMX018 can be used in conjunction with the CMX017, an integrated FM/FSK modulator and
transmitter, to implement a complete UHF radio link.
CONTENTS
Section
Page
1.0 Features and Applications ............................................................................ 1
1.1 Brief Description ............................................................................................ 1
1.2 Internal Block Diagram .................................................................................. 3
1.3 Signal List ....................................................................................................... 4
1.4 External Components .................................................................................... 6
1.5 General Description ....................................................................................... 7
1.5.1 Low Noise Amplifier.......................................................................
7
1.5.2 First Down-Converter
.................................................................... 7
1.5.3 Second Down-Converter
............................................................... 7
1.5.4 Limiting Amplifier and RSSI..........................................................
7
1.5.5 FM/FSK Demodulator.....................................................................
8
1.5.6 Zero-Power Mode
........................................................................... 8
1.6 Application Notes........................................................................................... 9
1.6.1 General
............................................................................................ 9
1.6.2 Example Schematic and Layout
................................................... 9
1.7 Performance Specification .......................................................................... 12
1.7.1 Electrical Performance
................................................................ 12
1.7.2 Packaging
..................................................................................... 15
1.7.3 Handling Precautions
.................................................................. 15
Note:
As this product is still in development, it is likely that a number of changes and additions will be made to
this specification. Items marked TBD or left blank will be included in later issues. Information in this
data sheet should not be relied upon for final product design.
©
1999
Consumer Microcircuits Limited
2
D/018/3
1.2
Internal Block Diagram
LNAIN
1
LNA
28
ENABLE
GND
2
27
GAINSEL
LNAOUT
3
26
LNADEC
GND
4
FIRST DOWN
CONVERTER
25
Vcc1
MIX1IN
5
24
GND
MIX1OUT
6
23
TANK
GND
7
BUFFERED
VCO OUTPUT
22
Vcc2
MIX2IN
8
21
OSCOUT
MIX2OUT
9
SECOND
DOWN
CONVERTER
20
OSCBA
GND 10
19
OSCEM
LIMIN 11
IF LIMITING
AMPLIFIER
430Ω
18
DETOUT
LIMDEC1 12
17
FM/FSK
DEMODULATOR
Vcc3
LIMDEC2 13
16
LIMOUT
RSSI 14
15
QUADIN
Figure 1 Internal Block Diagram
©
1999
Consumer Microcircuits Limited
3
D/018/3
1.3
Signal List
Package
D6
Pin No.
1
2
3
4
5
6
7
8
9
10
Name
Signal
Description
Type
I/P
GROUND
O/P
GROUND
I/P
O/P
GROUND
I/P
O/P
GROUND
LNA RF Input
LNA Ground connection
LNA RF Output
LNA Ground connection
RF Input to the First Down-Converter
IF Output from the First Down-Converter
First Down-Converter Ground connection
RF Input to the Second Down-Converter
IF Output from the Second Down-Converter
Second Down-Converter, Limiting Amplifier,
RSSI and Demodulator stages -
Ground connection
Input to the Limiting Amplifier
External Decoupling capacitors - one required at
each Limiting Amplifier Input
Receive Signal Strength Indicator output
Quadrature input to the FM Demodulator
Output from the Limiting Amplifier
Power supply to the Second Down-Converter,
Limiting Amplifier, RSSI and Demodulator stages
- nominally 3.0V
Output of the FM/FSK Quadrature Demodulator
Emitter connection to the Second Down-
Converter Local Oscillator transistor
Base connection to the Second Down-Converter
Local Oscillator transistor
O/P
POWER
Buffered Local Oscillator (Open-Collector) output
from the First Down-Converter
First Down-Converter Power supply
- nominally 3.0V
LNAIN
GND
LNAOUT
GND
MIX1IN
MIX1OUT
GND
MIX2IN
MIX2OUT
GND
11
12
13
14
15
16
17
LIMIN
LIMDEC1
LIMDEC2
RSSI
QUADIN
LIMOUT
Vcc3
I/P
I/P
I/P
O/P
I/P
O/P
POWER
18
19
20
21
22
DETOUT
OSCEM
OSCBA
OSCOUT
V
CC
2
O/P
©
1999
Consumer Microcircuits Limited
4
D/018/3
Package
D6
Pin No.
23
24
25
26
27
Name
TANK
GND
V
CC
1
Signal
Description
Type
I/P
GROUND
POWER
First Down-Converter Local Oscillator (VCO)
TANK/resonator connection
First Down-Converter VCO Ground connection
LNA Power supply - nominally 3.0V
External LNA bias decoupling capacitor
CMOS I/P
LNA Gain control logic input. A logic '0' provides
a typical power gain of 16dB and a logic '1'
provides an attenuation of 6dB
Zero-Power logic control. A logic '0' powers down
the device.
LNADEC
GAINSEL
28
ENABLE
CMOS I/P
Notes:
I/P =
O/P =
Input
Output
©
1999
Consumer Microcircuits Limited
5
D/018/3
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