NXP Semiconductors
Data Sheet: Technical Data
Document Number: IMX6SXAEC
Rev. 4, 11/2018
MCIMX6XxAxxxxxB
MCIMX6XxAxxxxxC
i.MX 6SoloX
Automotive
and Infotainment
Applications Processors
Package Information
Plastic Package
BGA 19 x 19 mm, 0.8 mm pitch
BGA 17 x 17 mm, 0.8 mm pitch
BGA 14 x 14 mm, 0.65 mm pitch
Ordering Information
See Table 1 on page 3
1
Introduction
1
The i.MX 6SoloX automotive and infotainment
processors represent NXP Semiconductor’s latest
achievement in integrated multimedia-focused products
offering high-performance processing with a high degree
of functional integration. These processors are designed
considering the needs of the growing automotive
infotainment, telematics, HMI, and display-based cluster
markets.
The i.MX 6SoloX processor features NXP’s advanced
implementation of the single Arm
®
Cortex
®
-A9 core,
which operates at speeds of up to 800 MHz, in addition
to the Arm Cortex-M4 core, which operates at speeds of
up to 227 MHz. This type of heterogeneous multicore
architecture provides greater levels of system
integration, smart low-power system awareness, and fast
real-time responsiveness. The i.MX 6SoloX includes a
GPU processor capable of supporting 2D and 3D
operations, a wide range of display and connectivity
options, and integrated power management. Each
processor provides a 32-bit
DDR3/DDR3L/LPDDR2-800 memory interface and a
number of other interfaces for connecting peripherals,
2
3
4
5
6
7
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Architectural Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Modules List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.1 Special Signal Considerations. . . . . . . . . . . . . . . . 18
3.2 Recommended Connections for Unused Analog
Interfaces. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Electrical Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . 20
4.1 Chip-Level Conditions . . . . . . . . . . . . . . . . . . . . . . 20
4.2 Power Supplies Requirements and Restrictions . . 33
4.3 Integrated LDO Voltage Regulator Parameters . . 34
4.4 PLL Electrical Characteristics . . . . . . . . . . . . . . . . 36
4.5 On-Chip Oscillators . . . . . . . . . . . . . . . . . . . . . . . . 37
4.6 I/O DC Parameters . . . . . . . . . . . . . . . . . . . . . . . . 38
4.7 I/O AC Parameters . . . . . . . . . . . . . . . . . . . . . . . . 43
4.8 Output Buffer Impedance Parameters. . . . . . . . . . 46
4.9 System Modules Timing . . . . . . . . . . . . . . . . . . . . 49
4.10 Multi-mode DDR Controller (MMDC). . . . . . . . . . . 61
4.11 General-Purpose Media Interface (GPMI) Timing. 62
4.12 External Peripheral Interface Parameters . . . . . . . 70
4.13 A/D Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
Boot Mode Configuration . . . . . . . . . . . . . . . . . . . . . . . 119
5.1 Boot Mode Configuration Pins. . . . . . . . . . . . . . . 119
5.2 Boot Device Interface Allocation . . . . . . . . . . . . . 121
Package Information and Contact Assignments . . . . . . 129
6.1 i.MX 6SoloX Signal Availability by Package . . . . 129
6.2 Signals with Different States During Reset and After
Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131
6.3 19x19 mm Package Information . . . . . . . . . . . . . 132
6.4 17x17 mm Package Information . . . . . . . . . . . . . 151
6.5 14x14 mm Package Information . . . . . . . . . . . . . 186
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 202
NXP Reserves the right to change the production detail specifications as may be
required to permit improvements in the design of its products
Introduction
such as WLAN, Bluetooth™, GPS, displays, and camera sensors.
The i.MX 6SoloX processors are specifically useful for applications such as:
• Entry-level infotainment
• Telematics
The features of the i.MX 6SoloX processors include:
• Dual-core architecture with one Arm Cortex-A9 processor plus one Arm Cortex-M4 processor—
Dual-core architecture enables the device to run an open operating system like Linux on the
Cortex-A9 core and an RTOS like MQX™ or FreeRTOS™ on the Cortex-M4 core. The Cortex-M4
core is standard on all i.MX 6SoloX processors.
• Multilevel memory system—The multilevel memory system of each processor is based on the L1
instruction and data caches, L2 cache, and internal and external memory. The processors support
many types of external memory devices, including DDR3, low voltage DDR3, LPDDR2, NOR
Flash, NAND Flash (MLC and SLC), OneNAND, Quad SPI, and managed NAND, including
eMMC up to rev 4.4/4.41/4.5.
• Smart speed technology—Power management implemented throughout the IC that enables
multimedia features and peripherals to consume minimum power in both active and various low
power modes.
• Dynamic voltage and frequency scaling—The processors improve the power efficiency of devices
by scaling the voltage and frequency to optimize performance.
• Multimedia powerhouse—The multimedia performance of each processor is enhanced by a
multilevel cache system, NEON™ MPE (Media Processor Engine) co-processor, a programmable
smart DMA (SDMA) controller, and an asynchronous sample rate converter.
• 2x Gigabit Ethernet with AVB—2x 10/100/1000 Mbps Gigabit Ethernet controllers with support
for Audio Video Bridging (AVB) for reliable, high-quality, low-latency multimedia streaming.
• Human-machine interface—Each processor provides a single integrated graphics processing unit
that supports an OpenGL ES 2.0 and OpenVG 1.1 3D and 2D graphics accelerator. In addition,
each processor provides up to two separate display interfaces (parallel display and LVDS display)
and a CMOS sensor interface (parallel).
• Interface flexibility—Each processor supports connections to a variety of interfaces: High-speed
USB on-the-go with PHY, high-speed USB host with PHY, High-Speed Inter-Chip USB, multiple
expansion card ports (high-speed MMC/SDIO host and other), 2 Gigabit Ethernet controllers with
support for Ethernet AVB, PCIe-II, two 12-bit ADC modules with 4 dedicated single-ended inputs,
two CAN ports, ESAI audio interface, and a variety of other popular interfaces (such as UART, I
2
C,
and I
2
S serial audio).
• Automotive environment support—Each processor includes interfaces, such as two CAN ports, an
MLB25/50 port, an ESAI audio interface, and an asynchronous sample rate converter for
multichannel/multisource audio.
• Advanced security—The processors deliver hardware-enabled security features that enable secure
e-commerce, digital rights management (DRM), information encryption, secure boot, and secure
software downloads. The security features are discussed in detail in the
i.MX 6SoloX Security
Reference Manual
(IMX6XSRM).
i.MX 6SoloX Automotive and Infotainment Applications Processors, Rev. 4, 11/2018
2
NXP Semiconductors
Introduction
•
Integrated power management—The processors integrate linear regulators and internally generate
voltage levels for different domains. This significantly simplifies system power management
structure.
For a comprehensive list of the i.MX 6SoloX features, see
Section 1.2, “Features”.
1.1
Ordering Information
Table 1. Ordering Information
Table 1
provides examples of orderable sample part numbers covered by this data sheet.
Part Number
Options
Mask
Set
Cortex- Cortex-
Junction
Qualification
A9
M4
Temperature
Tier
Speed
1
Speed
Range
800
MHz
227
MHz
Automotive
-40 to
+125°C
Package
17x17NP (NP=No PCIe)
Package code “VO”
17mm x 17mm
0.8pitch Map BGA
17x17NP (NP=No PCIe)
Package code “VO”
17mm x 17mm
0.8pitch Map BGA
14x14NP (NP=No PCIe)
Package code “VK”
14mm x 14mm
0.65pitch Map BGA
14x14NP (NP=No PCIe)
Package code “VK”
14mm x 14mm
0.65pitch Map BGA
17x17WP (WP=With PCIe)
Package code “VN”
17mm x 17mm
0.8pitch Map BGA
17x17WP (WP=With PCIe)
Package code “VN”
17mm x 17mm
0.8pitch Map BGA
19x19
Package code “VM”
19mm x 19mm
0.8pitch Map BGA
19x19
Package code “VM”
19mm x 19mm
0.8pitch Map BGA
MCIMX6X1AVO08AB Features not 2N19K
supported:
or
- 2D&3D GPU 3N19K
- PCIe
- LVDS
MCIMX6X1AVO08AC Features not 4N19K
supported:
- 2D&3D GPU
- PCIe
- LVDS
MCIMX6X1AVK08AB Features not 2N19K
or
supported:
- 2D&3D GPU 3N19K
- PCIe
- LVDS
MCIMX6X1AVK08AC Features not 4N19K
supported:
- 2D&3D GPU
- PCIe
- LVDS
MCIMX6X2AVN08AB Features not 2N19K
supported:
or
- 2D&3D GPU 3N19K
- LVDS
MCIMX6X2AVN08AC Features not 4N19K
supported:
- 2D&3D GPU
- LVDS
MCIMX6X4AVM08AB Full-featured
device
2N19K
or
3N19K
4N19K
800
MHz
227
MHz
Automotive
-40 to
+125°C
800
MHz
227
MHz
Automotive
-40 to
+125°C
800
MHz
227
MHz
Automotive
-40 to
+125°C
800
MHz
227
MHz
Automotive
-40 to
+125°C
800
MHz
227
MHz
Automotive
-40 to
+125°C
800
MHz
227
MHz
Automotive
-40 to
+125°C
MCIMX6X4AVM08AC Full-featured
device
800
MHz
227
MHz
Automotive
-40 to
+125°C
i.MX 6SoloX Automotive and Infotainment Applications Processors, Rev. 4, 11/2018
NXP Semiconductors
3
Introduction
1
If a 24 MHz input clock is used (required for USB), the maximum Cortex-A9 speed for 1 GHz speed grade is limited to 996 MHz
and the maximum Cortex-A9 speed for 800 MHz speed grade is limited to 792 MHz.
Figure 1
describes the part number nomenclature so that the users can identify the characteristics of the
specific part number they have (for example, cores, frequency, temperature grade, fuse options, and silicon
revision). The primary characteristic which describes which data sheet applies to a specific part is the
temperature grade (junction) field.
• The i.MX 6SoloX Automotive and Infotainment Applications Processors data sheet
(IMX6SXAEC) covers parts listed with an “A (Automotive temp)”
• The i.MX 6SoloX Applications Processors for Consumer Products data sheet (IMX6SXCEC)
covers parts listed with a “D (Commercial temp)” or “E (Extended Commercial temp)”
• The i.MX 6SoloX Applications Processors for Industrial Products data sheet (IMX6SXIEC) covers
parts listed with “C (Industrial temp)”
Ensure to have the proper data sheet for specific part by verifying the temperature grade (junction) field
and matching it to the proper data sheet. If there will be any questions, visit see the web page
nxp.com/imx6series or contact a NXP representative for details.
MC
IMX6
X
@
+
VV
$$
%
A
Silicon Revision
1
Rev 1.2 Production (Maskset 2N19K)
Rev 1.3 Production (Maskset 3N19K)
Rev 1.4 Production (Maskset 4N19K)
Qualification Level
Prototype Samples
Mass Production
Special
MC
PC
MC
SC
A
B
C
Fusing
i.MX 6 Family
i.MX 6SoloX
%
A
X
X
Security Enabled
ARM Cortex-A9 Frequency
Part Differentiator
Package
GPU
Y
VM
Y
VN
VO
VK
Y
Y
Y
-
VN
-
-
VO
-
-
VK
-
PCIe
Y
Y
Y
-
-
Y
Y
-
-
-
-
LVDS
Y
Y
-
-
-
-
-
-
-
-
-
ADC
2x 4ch
2x 4ch
1x 2ch
2x 4ch
2x 4ch
1x 2ch
1x 2ch
2x 4ch
2x 4ch
2x 4ch
2x 4ch
MLB
$$
08
10
@
800 MHz
1 GHz
Automotive
Ext. Commercial/ Industrial
Ext. Commercial/ Industrial
Ext. Commercial/ Industrial
Ext. Commercial/ Industrial
Automotive
Ext. Commercial/ Industrial
Automotive
Ext. Commercial/ Industrial
Automotive
Ext. Commercial/ Industrial
Y
4
-
-
-
-
Y
Package Type
3
14x14NP: MAPBGA 14x14 0.65mm
NP = No PCIe
17x17NP: MAPBGA 17x17 0.8mm
NP = No PCIe
2
17x17WP: MAPBGA 17x17 0.8mm
WP = With PCIe
MAPBGA 19x19 0.8mm
1
ROHS
VK
VO
VN
VM
-
Y
-
Y
-
Junction Temperature (Tj)
Extended Commercial: -20 to + 105C
Industrial: -40 to +105C
+
E
C
A
1. See the nxp.com\imx6series Web page for latest information on the available silicon revision.
Auto: -40 to + 125C
Figure 1. Part Number Nomenclature—i.MX 6SoloX
i.MX 6SoloX Automotive and Infotainment Applications Processors, Rev. 4, 11/2018
4
NXP Semiconductors
Introduction
1.2
Features
The i.MX 6SoloX processors are based on the Arm Cortex-A9 MPCore™ platform, which has the
following features:
• Supports single Arm Cortex-A9 MPCore processor (with TrustZone)
• The core configuration is symmetric, where each core includes:
— 32 KByte L1 Instruction Cache
— 32 KByte L1 Data Cache
— Private Timer and Watchdog
— Cortex-A9 NEON MPE (Media Processing Engine) coprocessor
The Arm Cortex-A9 MPCore complex includes:
• General Interrupt Controller (GIC) with 128 interrupt support
• Global Timer
• Snoop Control Unit (SCU)
• 256 KB unified I/D L2 cache:
• Two Master AXI bus interfaces output of L2 cache
• Frequency of the core (including NEON coprocessor and L1 cache), as per
Table 10, “Operating
Ranges,” on page 26.
• NEON MPE coprocessor
— SIMD Media Processing Architecture
— NEON register file with 32x64-bit general-purpose registers
— NEON Integer execute pipeline (ALU, Shift, MAC)
— NEON dual, single-precision floating point execute pipeline (FADD, FMUL)
— NEON load/store and permute pipeline
— 32 double-precision VFPv3 floating point registers
The Arm Cortex-M4 platform:
• Cortex-M4 CPU core
• MPU (Memory Protection Unit)
• FPU (Floating Point Unit)
• 16 KByte Instruction Cache
• 16 KByte Data Cache
• 64 KByte TCM (Tightly-Coupled Memory)
The SoC-level memory system consists of the following additional components:
— Boot ROM, including HAB (96 KB)
— Internal multimedia / shared, fast access RAM (OCRAM, 128 KB)
— Internal RAM for state retention or general use (OCRAM_S, 16KB)
— Secure/non-secure RAM (32 KB)
i.MX 6SoloX Automotive and Infotainment Applications Processors, Rev. 4, 11/2018
NXP Semiconductors
5
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