supply voltage change, load change, shock and vibration.
± 20 PPM available in extended commercial
temperature only
1st year at 25°C
Extended Commercial
Industrial
Any voltage between 2.5V and 3.3V is supported with 1 decimal
point resolution.
Current Consumption
Standby Current
Idd
I_std
Duty Cycle
Rise/Fall Time
DC
Tr, Tf
Output Voltage High
Output Voltage Low
Input Voltage High
Input Voltage Low
Startup Time
Resume Time
RMS Period Jitter
RMS Phase Jitter (random)
VOH
VOL
VIH
VIL
T_start
T_resume
T_jitt
T_phj
No load condition, f = 20 MHz, Vdd = 2.5 V, 2.8 V or 3.3 V
No load condition, f = 20 MHz, Vdd = 1.8 V
ST = GND, Vdd = 3.3 V, Output is Weakly Pulled Down
ST = GND, Vdd = 2.5 or 2.8 V, Output is Weakly Pulled Down
ST = GND, Vdd = 1.8 V, Output is Weakly Pulled Down
All Vdds. f <= 75 MHz
All Vdds. f > 75 MHz
15pF load, 20% - 80% Vdd=2.5V, 2.8V or 3.3V
15pF load, 20% - 80% Vdd=1.8V
30pF load, 20% - 80% Vdd=2.5V, 2.8V or 3.3V
30pF load, 20% - 80% Vdd=1.8V
45pF load, 20% - 80% Vdd=2.5V, 2.8V or 3.3V
45pF load, 20% - 80% Vdd=1.8V
IOH = -4 mA (Vdd = 3.3 V)
IOH = -3 mA (Vdd = 2.8 V and Vdd = 2.5 V)
IOH = -2 mA (Vdd = 1.8 V)
Pin 1, OE or ST
Pin 1, OE or ST
Measured from the time Vdd reaches its rated minimum value
Measured from the time ST pin crosses 50% threshold
f = 75 MHz, Vdd = 2.5 V, 2.8 V or 3.3 V
f = 75 MHz, Vdd = 1.8 V
f = 75 MHz @ BW: 900 kHz to 7.5 MHz, VDD = 2.5 V to 3.3 V
f = 75 MHz @ BW: 900 kHz to 7.5 MHz, VDD = 1.8 V
Note:
1. All electrical specifications in the above table are measured with 15pF output load, unless stated otherwise in the Condition. For more information about SoftEdge
TM
rise/fall time for driving higher output load or reducing EMI, download http://www.sitime.com/support2/documents/AN10022-rise-and-fall-time-rev1.1.pdf.
SiTime Corporation
Rev. 1.46
990 Almanor Avenue
Sunnyvale, CA 94085
(408) 328-4400
www.sitime.com
Revised August 11, 2011
SiT8103
High Performance 1-110 MHz Oscillator
Pin Description Tables
Pin #1 Functionality
OE
H or
Open
[2]
:
specified frequency output
Pin Map
Pin
1
2
ST
H or Open: specified frequency output
L: output is low level (weak pull down). Oscillation stops
3
4
Connection
OE/ST
GND
CLK
VDD
L: output is high impedance
Absolute Maximum Table
Attempted operation outside the absolute maximum ratings of the part may cause permanent damage to the part. Actual performance of the IC
is only guaranteed within the operational specifications, not at absolute maximum ratings.
Parameter
Storage Temperature
VDD
Electrostatic Discharge
Theta JA (with copper plane on VDD and GND)
Theta JC (with PCB traces of 0.010 inch to all pins)
Soldering Temperature (follow standard Pb free soldering guidelines)
Number of Program Writes
Program Retention over -40 to 125°C, Process, VDD (0 to 3.65 V)
Min.
-65
-0.5
–
–
–
–
–
1,000+
Max.
150
4
6000
75
24
260
1
–
Unit
°C
V
V
°C/W
°C/W
°C
NA
years
Environmental Compliance
Parameter
Mechanical Shock
Mechanical Vibration
Temperature Cycle
Solderability
Moisture Sensitivity Level
Condition/Test Method
MIL-STD-883F, Method 2002
MIL-STD-883F, Method 2007
JESD22, Method A104
MIL-STD-883F, Method 2003
MSL1 @ 260°C
Startup and Resume Timing Diagram
90% Vdd: 2.5/2.8/3.3 V parts
95% Vdd: 1.8 V parts
Vdd
ST Voltage
Vdd
Pin 4 Voltage
50% Vdd
T_resume
T_start
CLK Output
CLK Output
T_start: Time to start from power-off
(ST/OE Mode)
Note:
2. In 1.8 V mode, a resistor of <100 kΩ between OE pin and VDD is required.
T_resume: Time to resume from ST
(ST Mode Only)
■
Dimensions and Land Patterns
Rev. 1.46
Page 2 of 4
www.sitime.com
SiT8103
High Performance 1-110 MHz Oscillator
Package Size – Dimensions (Unit: mm)
[]
2.5 x 2.0 x 0.75 mm
2.5 ± 0.10
#4
#3
#3
Recommended Land Pattern (Unit: mm)
[5]
1.00
1.9
#4
2.0 ± 0.10
YXXXX
1.1
0.75 ± 0.05
0.75
1.1
3.2 x 2.5 x 0.75 mm
3.2 ± 0.15
#4
#3
#3
2.1
#4
2.2
0.9
YXXXX
2.5 ± 0.15
0.75 ± 0.05
0.9
1.4
5.0 x 3.2 x 0.75 mm
5.0 ± 0.15
#4
#3
#3
2.39
#4
2.54
YXXXX
3.2 ± 0.15
0.8
0.75 ± 0.05
1.15
1.5
7.0 x 5.0 x 0.90 mm
7.0 ± 0.15
#4
#3
#3
5.08
1.7
5.08
#4
5.0 ± 0.15
2.6
1.1
3.81
YXXXX
2.1
No Connect
[5]
#1
#2
#2
#1
0.90 ± 0.10
1.4
2.2
Notes:
3. Top marking: Y denotes manufacturing origin and XXXX denotes manufacturing lot number. The value of “Y” will depend on the assembly location of the device
4. A capacitor of value 0.1
μ
F between Vdd and GND is recommended.
5. The 7050 package with part number designation "-8" has NO center pad.
Rev. 1.46
Page 3 of 4
2.0
1.6
#1
#2
#2
#1
1.1
2.2
1.2
#1
#2
#2
#1
0.7
1.9
1.0
#1
#2
#2
#1
0.5
1.5
www.sitime.com
SiT8103
High Performance 1-110 MHz Oscillator
■
Part No. Guide
-
How to Order
The Part No. Guide is for reference only. For real-time customization and exact part number, use the SiTime
Part Number Generator.
SiT8103AC -13-18E -105.12345T
Packaging
Part Family
“SiT8103”
Revision Letter
“A” is the revision
Temperature Range
“C” Commercial, -20 to 70ºC
“I” Industrial, -40 to 85ºC
Supply Voltage
Output Driver Strength
[6]
“–” Default
Package Size
“1” 2.5 x 2.0 mm
“2” 3.2 x 2.5 mm
“3” 5.0 x 3.2 mm
“4” 7.0 x 5.0 mm
“8” 7.0 x 5.0 mm
[7]
[8]
“T”: Tape & Reel, 3K reel
“Y”: Tape & Reel, 1K reel
Blank for Bulk
Frequency
1.00000 to 110.00000 MHz
Feature Pin
“E” for Output Enable
“S” for Standby
“18” for 1.8 V ±5%
“25” for 2.5 V ±10%
“28” for 2.8 V ±10%
“33” for 3.3 V ±10%
Frequency Stability
“1” for ±20 PPM
“2” for ±25 PPM
“3” for ±50 PPM
“8” for ±30 PPM
Notes:
6. Contact SiTime for different drive strength options for driving loads with faster rise/fall time spec than those shown in the electrical table, or reducing EMI.
7. Without Center Pad.
8. Supply voltage can be configured to any voltage up to 1 decimal place between 2.5V and 3.3V.
Product which is caused in whole or in part by (i) use of any circuitry other than circuitry embodied in a SiTime product, (ii) misuse or abuse including static discharge, neglect or accident, (iii)
unauthorized modification or repairs which have been soldered or altered during assembly and are not capable of being tested by SiTime under its normal test conditions, or (iv) improper
installation, storage, handling, warehousing or transportation, or (v) being subjected to unusual physical, thermal, or electrical stress.
Disclaimer:
SiTime makes no warranty of any kind, express or implied, with regard to this material, and specifically disclaims any and all express or implied warranties, either in fact or by
operation of law, statutory or otherwise, including the implied warranties of merchantability and fitness for use or a particular purpose, and any implied warranty arising from course of dealing or
usage of trade, as well as any common-law duties relating to accuracy or lack of negligence, with respect to this material, any sitime product and any product documentation. products sold by
sitme are not suitable or intended to be used in a life support application or component, to operate nuclear facilities, or in other mission critical applications where human life may be involved or
at stake. all sales are made conditioned upon compliance with the critical uses policy set forth below.
CRITICAL USE EXCLUSION POLICY
BUYER AGREES NOT TO USE SITIME'S PRODUCTS FOR ANY APPLICATION OR IN ANY COMPONENTS USED IN LIFE SUPPORT DEVICES OR TO OPERATE NUCLEAR FACILITIES
OR FOR USE IN OTHER MISSION-CRITICAL APPLICATIONS OR COMPONENTS WHERE HUMAN LIFE OR PROPERTY MAY BE AT STAKE.
SiTime owns all rights, title and interest to the intellectual property related to SiTime's products, including any software, firmware, copyright, patent, or trademark. The sale of SiTime products
does not convey or imply any license under patent or other rights. SiTime retains the copyright and trademark rights in all documents, catalogs and plans supplied pursuant to or ancillary to
the sale of products or services by SiTime. Unless otherwise agreed to in writing by SiTime, any reproduction, modification, translation, compilation, or representation of this material shall be
想听听各位高人的意见！
回答一：
Verification:
Software: use EDA like HDL simulation and ATPG to verify HDL and gate function.
Hardware: use different instrument to verify IC ......
PCB设计
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