The LS156 is a Dual 1-of-4 Decoder/Demultiplexer with
common Address inputs and separate gated Enable inputs.
When enabled, each decoder section accepts the binary
weighted Address inputs (A
0
, A
1
) and provides four mutually
exclusive active LOW outputs (O
0
−O
3
). If the Enable
requirements of each decoder are not met, all outputs of that
decoder are HIGH.
Each decoder section has a 2-input enable gate. The
enable gate for Decoder “a” requires one active HIGH input
and one active LOW input (E
a
•E
a
). In demultiplexing
applications, Decoder “a” can accept either true or
complemented data by using the E
a
or E
a
inputs respectively.
The enable gate for Decoder “b” requires two active LOW
inputs (E
b
•E
b
). The LS155 or LS156 can be used as a 1-of-8
Decoder/Demultiplexer by tying E
a
to E
b
and relabeling the
common connection as (A
2
). The other E
b
and E
a
are
connected together to form the common enable.
The LS156 can be used to generate all four minterms of
two variables. These four minterms are useful in some
applications replacing multiple gate functions as shown in
Fig. a. The LS156 has the further advantage of being able to
TRUTH TABLE
ADDRESS
A
0
X
X
L
H
L
H
A
1
X
X
L
L
H
H
ENABLE “a”
E
a
L
X
H
H
H
H
E
a
X
H
L
L
L
L
O
0
H
H
L
H
H
H
OUTPUT “a”
O
1
H
H
H
L
H
H
O
2
H
H
H
H
L
H
O
3
H
H
H
H
H
L
ENABLE “b”
E
b
H
X
L
L
L
L
E
b
X
H
L
L
L
L
O
0
H
H
L
H
H
H
OUTPUT “b”
O
1
H
H
H
L
H
H
O
2
H
H
H
H
L
H
O
3
H
H
H
H
H
L
AND the minterm functions by tying outputs together. Any
number of terms can be wired-AND as shown below.
f = (E + A
0
+ A
1
)
⋅
(E + A
0
+ A
1
)
⋅
(E + A
0
+ A
1
)
⋅
(E + A
0
+ A
1
)
where E = E
a
+ E
a
; E = E
b
+ E
b
E
A
0
A
1
E
A
0
A
1
E
A
0
A
1
E
A
0
A
1
E
O
0
A
0
A
1
E
O
1
A
0
A
1
E
O
2
A
0
A
1
E
A
0
O
3
A
1
O
0
O
1
O
2
O
3
Figure a
H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
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2
SN74LS155
SN54/74LS156
GUARANTEED OPERATING RANGES
Symbol
V
CC
T
A
V
OH
I
OL
Supply Voltage
Operating Ambient Temperature Range
Output Voltage — High
Output Current — Low
Parameter
54
74
54
74
54, 74
54
74
Min
4.5
4.75
−55
0
Typ
5.0
5.0
25
25
Max
5.5
5.25
125
70
5.5
4.0
8.0
Unit
V
°C
V
mA
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE
(unless otherwise specified)
Limits
Symbol
V
IH
V
IL
V
IK
I
OH
V
OL
Parameter
Input HIGH Voltage
Input LOW Voltage
Input Clamp Diode Voltage
Output HIGH Current
Output LOW Voltage
54, 74
54, 74
74
0.25
0.35
54
74
−0.65
Min
2.0
0.7
0.8
−1.5
100
0.4
0.5
20
0.1
−0.4
10
Typ
Max
Unit
V
V
V
μA
V
V
μA
mA
mA
mA
Test Conditions
Guaranteed Input HIGH Voltage for
All Inputs
Guaranteed Input LOW Voltage for
All Inputs
V
CC
= MIN, I
IN
=
−
18 mA
V
CC
= MIN, V
OH
= MAX
I
OL
= 4.0 mA
I
OL
= 8.0 mA
V
CC
= V
CC
MIN,
V
IN
= V
IL
or V
IH
per Truth Table
I
IH
I
IL
I
CC
Input HIGH Current
Input LOW Current
Power Supply Current
V
CC
= MAX, V
IN
= 2.7 V
V
CC
= MAX, V
IN
= 7.0 V
V
CC
= MAX, V
IN
= 0.4 V
V
CC
= MAX
AC CHARACTERISTICS
(T
A
= 25°C)
Limits
Symbol
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
Parameter
Propagation Delay
Address, E
a
or E
b
to Output
Propagation Delay
Address to Output
Propagation Delay
E
a
to Output
Min
Typ
25
34
31
34
32
32
Max
40
51
46
51
48
48
Unit
ns
ns
ns
Figure 1
Figure 2
Figure 1
V
CC
= 5.0 V
C
L
= 15 pF
R
L
= 2.0 kΩ
Test Conditions
AC WAVEFORMS
V
IN
1.3 V
t
PHL
V
OUT
1.3 V
1.3 V
t
PLH
1.3 V
V
OUT
V
IN
1.3 V
t
PHL
1.3 V
1.3 V
t
PLH
1.3 V
Figure 1
Figure 2
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3
SN74LS155
ON Semiconductor
and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
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“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
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