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SA53
SA53
DESCRIPTION
The SA53 is a fully integrated switching amplifier de-
signed primarily to drive DC brush motors. Two inde-
pendent half bridges provide over 10 amperes peak
output current under microcontroller or DSC control.
Thermal and short circuit monitoring is provided, which
generates fault signals for the microcontroller to take
appropriate action. A block diagram is provided in Fig-
ure 1.
Additionally, cycle-by-cycle current limit offers user
programmable hardware protection independent of the
microcontroller. Output current is measured using an
innovative low loss technique. The SA53 is built using
a multi-technology process allowing CMOS logic con-
trol and complementary DMOS output power devices
on the same IC. Use of P-channel high side FETs en-
ables 60V operation without bootstrap or charge pump
circuitry.
The HSOP surface mount package balances excellent
thermal performance with the advantages of a low pro-
file surface mount package.
FEATURES
♦ Low Cost Intelligent Switching Amplifier
♦ Directly Connects to Most Embedded Micro-
controllers and Digital Signal Controllers
♦ Integrated Gate Driver Logic with Dead-time
Generation and Shoot-through Prevention
♦ Wide Power Supply Range (8.5 V To 60 V)
♦ Over 10A Peak Output Current per Phase
♦ Independent Current Sensing for each Output
♦ User Programmable Cycle-by-cycle Current
Limit Protection
♦ Over-Current and Over-Temperature Warning
Signals
APPLICATIONS
♦
♦
♦
♦
Bidirectional DC Brush Motors
2 Unidirectional DC Brush Motors
2 Independent Solenoid Actuators
Stepper Motors
SC
TEMP
I
LIM
/D IS 1
I1
I2
D IS 2
1t
1b
PWM
Signals
2t
2b
SGND
SA53U
www.cirrus.com
35AS
Switching Amplifier
FIGURE 1. BLOCK DIAGRAM
V
S
+
V
DD
V
S
1
V
S
2
Fault
Logic
I1'
I2'
V
DD
V
DD
Gate
Control
P ha se 1
I1'
I2'
O ut 1
O ut 2
Control
Logic
P ha se 2
SA53 Switching Amplifier
PGND 1
GND
Copyright © Cirrus Logic, Inc. 2010
(All Rights Reserved)
PGND 2
JUN 2010
1
APEX − SA53UREVC
SA53
Product Innovation From
1. CHARACTERISTICS AND SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS
Parameter
SUPPLY VOLTAGE
SUPPLY VOLTAGE
LOGIC INPUT VOLTAGE
OUTPUT CURRENT, peak, 10ms
POWER DISSIPATION, avg, 25ºC
TEMPERATURE, solder, 10sec
TEMPERATURE, junction
TEMPERATURE RANGE, storage
OPERATING TEMPERATURE, case
(NOTE 2)
(NOTE 2)
(NOTE 2)
I
OUT
P
D
T
S
T
J
T
STG
T
A
TEST CONDITIONS
(Note 1)
−55
−25
Symbol
V
S
V
DD
Min
Max
60
5.5
Units
V
V
V
A
W
°C
°C
°C
°C
(-0.5)
(V
DD
+0.5)
10
100
260
150
+125
+85
SPECIFICATIONS
PARAMETER
LOGIC
INPUT LOW
INPUT HIGH
OUTPUT LOW
OUTPUT HIGH
OUTPUT CURRENT
(SC, Temp, I
LIM
/DIS1)
POWER SUPPLY
V
S
V
S
UNDERVOLTAGE LOCKOUT, (UVLO)
V
DD
SUPPLY CURRENT, V
S
SUPPLY CURRENT, V
DD
CURRENT LIMIT
CURRENT LIMIT THRESHOLD (Vth)
Vth HYSTERESIS
OUTPUT
CURRENT, CONTINUOUS
RISING DELAY, TD (RISE)
FALLING DELAY, TD (FALL)
DISABLE DELAY, TD (DIS)
ENABLE DELAY, TD (DIS)
RISE TIME, T (RISE)
FALL TIME, T (FALL)
ON RESISTANCE SOURCING
(P-CHANNEL)
ON RESISTANCE
SINKING (N-CHANNEL)
2
25ºC Case Temperature
See Figure 10
See Figure 10
See Figure 10
See Figure 10
See Figure 11
See Figure 11
3A Load
3A Load
3
270
270
200
200
50
50
400
400
A
ns
ns
ns
ns
ns
ns
mΩ
mΩ
SA53U
3.75
100
V
mV
20 kHz (One phase switching at 50%
duty cycle) , V
S
=50V, V
DD
=5V
20 kHz (One phase switching at 50%
duty cycle) , V
S
=50V, V
DD
=5.5V
4.5
25
5
UVLO
50
8.3
5.5
30
6.5
60
V
V
V
mA
mA
3.7
50
1.8
0.3
1
V
V
V
V
mA
MIN
TYP
MAX
UNITS
Product Innovation From
SA53
SPECIFICATIONS, continued
PARAMETER
THERMAL
THERMAL WARNING
THERMAL WARNING HYSTERESIS
RESISTANCE, junction to case
TEMPERATURE RANGE, case
Full temperature range
Meets Specifications
−25
135
40
1.25
1.5
+85
ºC
ºC
ºC/W
ºC
TEST CONDITIONS
(Note 1)
MIN
TYP
MAX
UNITS
NOTES:
1. (All Min/Max characteristics and specifications are guaranteed over the Specified Operating Condi-
tions. Typical performance characteristics and specifications are derived from measurements taken
at typical supply voltages and T
C
= 25°C).
2. Long term operation at elevated temperature will result in reduced product life. De-rate internal power
dissipation to achieve high MTBF.
3. Output current rating may be limited by duty cycle, ambient temperature, and heat sinking. Under any
set of conditions, do not exceed the specified current rating or a junction temperature of 150°C.
FIGURE 2A.
44-pin HSOP Slug Up, Package Style HU
FIGURE 2B.
64-pin QFP, Package Style HQ
SA53U
3
SA53
V
S
SUPPLY CURRENT
V
S
SUPPLY CURRENT (mA)
Product Innovation From
25
V
S
SUPPLY CURRENT (mA)
20
15
10
5
0
10
180
160
120
100
80
60
40
20
0
0
140
V
S
SUPPLY CURRENT
10
LOAD CURRENT (A)
CURRENT SENSE
125°C
25°C
1
ONE PHASE SWITCHING
FREQUENCY = 20kHz
50% DUTY CYCLE
20
30
40
50
V
S
SUPPLY VOLTAGE (V)
60
ONE PHASE SWITCHING @
50% DUTY CYCLE; V
S
=50V
50
100 150 200 250 300
FREQUENCY (kHz)
0.1
0.01
0.1
1
SENSE CURRENT (mA)
10
8
V
DD
SUPPLY CURRENT (mA)
7.5
7
6.5
6
5.5
5
4.5
4
10
V
DD
SUPPLY CURRENT
V
DD
SUPPLY CURRENT (mA)
ONE PHASE SWITCHING
FREQUENCY = 20kHz
50% DUTY CYCLE
5
4.9
4.8
4.7
4.6
4.5
0
V
DD
SUPPLY CURRENT
POWER DISSIPATION, P
D
120
100
80
60
40
20
0
-40
POWER DERATING
125°C
25°C
ONE PHASE SWITCHING @
50% DUTY CYCLE; V
S
=50V
50
100 150 200 250 300
FREQUENCY (kHz)
0.8
0.75
(N-Channel)
0.7
0.65
0.6
0.55
V
S
=11
0.5
V
S
=13
0.45
V
S
=15
0.4
0.35
V
S
=17
0.3
0.25
0.2
V
S
>22
0.15
0 1 2 3 4 5 6 7 8 9 10
I
OUT
,(A)
ON RESISTANCE - BOTTOM FET
20
30
40
50
V
S
SUPPLY VOLTAGE (V)
60
0.8
0.75
(P-Channel)
0.7
0.65
0.6
V
S
=11
0.55
V
S
=13
0.5
0.45
V
S
=15
0.4
0.35
0.3
V
S
>17
0.25
0.2
0.15
0 1 2 3 4 5 6 7 8 9 10
I
OUT
,(A)
ON RESISTANCE - TOP FET
0
40
80
120
CASE TEMPERATURE, T
C
RDS(on),(Ω)
RDS(on),(Ω)
DIODE FORWARD VOLTAGE - BOTTOM FET
5
4
(N-Channel)
5
4
CURRENT (A)
3
2
1
DIODE FORWARD VOLTAGE - TOP FET
(P-Channel)
CURRENT (A)
3
2
1
0
0.5
0.7
0.9
1.1
1.3
FORWARD VOLTAGE (V)
1.5
0
0.5
0.7
0.9
1.1
1.3
FORWARD VOLTAGE (V)
1.5
4
SA53U
Product Innovation From
SA53
FIGURE 3A. EXTERNAL CONNECTIONS - 44-pin HSOP
TOP (SLUG) VIEW
NC
NC
NC
TEMP
DIS1
I1
Vdd
1t
1b
SGND
SGND
SGND
Ilim/DIS1
SGND
SC
I2
2t
2b
NC
NC
NC
NC
22
23
XXXXXXXXXXXX COO
1
PIN #1 ID’s:
CHAMFER, ESD Triangle
44
PGND/SLUG
NC
VS1
VS1
NC
OUT1
OUT1
NC
PGND1
PGND1
NC
NC
VS2
VS2
NC
OUT2
OUT2
NC
PGND2
PGND2
NC
PGND/SLUG
TABLE 1A. PIN DESCRIPTIONS - 44-pin HSOP
25,26
38,39
41,42
8
5
6
7
10
9,11,12,13
14
15
16
17
18
19
35,36
28,29
31,32
23,44
1,2,3,4,20,
21,22,24,27,
30,33,34,37,
40,43
Pin #
SA53HU-IH
Pin Name
V
S
(phase 1)
OUT 2
PGND (phase 2)
SC
2b
2t
I2
I
LIM
/DIS1
SGND
1b
1t
V
DD
I1
DIS2
TEMP
V
S
(phase 2)
OUT 1
PGND (phase 1)
HS
NC
High Voltage Supply (8.5-60V) supplies phase 1 only
Half Bridge 2 Power Output
High Current GND Return Path for Power Output 2
Indication of a short of an output to supply, GND or another phase
Logic high commands 2 phase lower FET to turn on
Logic high commands 2 phase upper FET to turn on
Phase 2 current sense output
As an output, logic high indicates cycle-by-cycle current limit, and
logic low indicates normal operation. As an input, logic high places
Logic Input/Output
all outputs in a high impedance state and logic low disables the
cycle-by-cycle current limit function.
Power
Analog and digital GND – internally connected to PGND
Logic Input
Logic high commands 1 phase lower FET to turn on
Logic Input
Logic high commands 1 phase upper FET to turn on
Power
Logic Supply (5V)
Analog Output
Phase 1 current sense output
Logic Input
Logic high places all outputs in a high impedance state
Logic Output
Thermal indication of die temperature above 135ºC
Power
High Voltage Supply phase 2
Power Output
Half Bridge 1 Power Output
Power
High Current GND Return Path for Power Outputs 1 & 2
Mechanical
Pins connected to the package heat slug
---
Do Not Connect
Power
Power Output
Power
Logic Output
Logic Input
Logic Input
Analog Output
Signal Type
Simplified Pin Description
SA53U
5
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