SUMMIT
MICROELECTRONICS, Inc.
SMD1102 / 1103 / 1113
Preliminary
10-Bit Data Acquisition System for
Autonomous Environmental Monitoring
FEATURES
!
Complete Data Acquisition System
"
10-Bit A/D Converter Resolution
"
75µs Acquisition plus Conversion Time
"
Alarm Limits for Each Input Channel
"
Auto-Increment of Input Channels
"
Two Wire I
2
C Serial Data Interface
"
System Management Bus (SMBus) Compat-
ible
"
Auto-Monitor with SMB
ALERT
Output
"
Low Quiescent Current of 50µA
"
Wide Supply Voltage Range: 2.7V to 5.5V
!
SMD1102
"
2-Channel Analog Input
"
External Voltage Reference Input Provided for
Absolute Measurements
!
SMD1103
"
3-Channel Analog Input
"
Reference Voltage Input for the A/D Converter
is Connected to V
DD
for Ratiometric Measure-
ments
!
SMD1113
"
Extended I
2
C Operation
"
3-Channel Analog Input
"
External Voltage Reference Input Provided
for Absolute Measurements
FUNCTIONAL BLOCK DIAGRAM
VDD
(1102,
1113)
REFIN
X
(1103, A 2
IN
1113)
AIN1
AIN0
X
ANALOG
MULTIPLEXER
SAMPLE
AND
HOLD
SMBALERT#
CONTROL
LOGIC
10-BIT A/D
CONVERTER
CONVERTER
CLOCK
Note: See Pin
Configuration
drawings for
pinouts
(1113) CE#
E2PROM
ALARM LIMIT
REGISTERS
2-WIRE
SERIAL
INTERFACE
SCL
SDA
(1113) A2
(1113) A1
(1113) A0
GND
2033 BD 7.0
©SUMMIT MICROELECTRONICS, Inc., 2001 • 300 Orchard City Dr., Suite 131 • Campbell, CA 95008 • Phone 408-378-6461 • FAX 408-378-6586 •
www.summitmicro.com
Characteristics subject to change without notice
2033 8.1 10/04/01
1
SMD1102 / 1103 / 1113
INTRODUCTION
The SMD1102, SMD1103 and SMD1113 each contain a
10-Bit data acquisition system (DAS) with dedicated EE-
PROM alarm limit storage. The three devices communi-
cate with the host µP via a standard two-wire I
2
C serial
interface. After initialization the SMD1102/1103/1113 can
automatically monitor one or more analog input channels.
If any input signal moves beyond its user-programmed
limits the host is notified by the SMB
ALERT
#
output, enabling
fault prediction in telecom line card applications, as an
example.
PIN CONFIGURATION
8-Pin SOIC
PIN NAMES
1102
A
IN
0, A
IN
1
Analog channel inputs
Power supply return
Reference input
Serial Clock
Serial Data
Interrupt output
Power Supply
SMD1102
REF
IN
A
IN
1
A
IN
0
GND
1
2
3
4
8
7
6
5
V
DD
SMB
ALERT
#
SCL
SDA
2033 8 PCon-2
GND
REF
IN
SCL
SDA
SMB
ALERT
#
V
DD
8-Pin SOIC
SMD1103
A
IN
2
A
IN
1
A
IN
0
GND
1
2
3
4
8
7
6
5
V
DD
SMB
ALERT
#
SCL
SDA
2033 8 PCon-3
1103
A
IN
0, A
IN
1, A
IN
2
GND
SCL
SDA
SMB
ALERT
#
V
DD
Analog channel inputs
Power supply return
Serial Clock
Serial Data
Interrupt output
Power Supply
1113
14-Pin SOIC
SMD1113
CE#
A2, A1, A0
Chip Enable
I
2
C Address select inputs
Analog channel inputs
Power supply return
Reference input
Serial Clock
Serial Data
Interrupt output
Power Supply
A0
A1
A2
A
IN
2
A
IN
1
A
IN
0
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
DD
CE#
REF
IN
NC
SMB
ALERT
#
SCL
SDA
2033 14 PCon
A
IN
0, A
IN
1, A
IN
2
GND
REF
IN
SCL
SDA
SMB
ALERT
#
V
DD
2
2033 8.1 10/04/01
SUMMIT MICROELECTRONICS, Inc.
SMD1102 / 1103 / 1113
ABSOLUTE MAXIMUM RATINGS*
Temperature Under Bias ...................... –55°C to 125°C
Storage Temperature ........................... –65°C to 150°C
Lead Solder Temperature (10 seconds) ............. 300 °C
Terminal Voltage with Respect to GND:
All ......................................... –2V to 7V
*COMMENT
Stresses listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions
outside those listed in the operational sections of this specification is not
implied. Exposure to any absolute maximum rating for extended
periods may affect device performance and reliability.
DC OPERATING CHARACTERISTICS
(Over
Recommended Operating Conditions; Voltages are relative to GND)
Symbol
V
CC
I
CC
I
SB
I
LI
I
LO
V
OL
Parameter
Supply Voltage
Supply Current
Standby Current
Input leakage current
Output leakage current
Output low voltage
All outputs open
All outputs open, ADC idle,
no memory write in process
V
IN
= 0V to V
CC
V
OUT
= 0V to V
CC
V
CC
= 5V, I
OL
= 2.1mA
V
CC
< 4.5V, I
OL
= 1mA
Output high voltage
Input low voltage
Input high voltage
V
REF
input voltage
Input voltage on A
IN
0
through A
IN
2
V
CC
= 5V, I
OL
= –400µA
V
CC
< 4.5V, I
OL
= –100µA
2.4
V
V
CC
– 0.2
–0.1
0.7
×
V
CC
1
0
0.3
×
V
CC
V
CC
+ 0.7
V
CC
5.5
V
V
V
V
2033 Elect Table
Conditions
(Note 1)
Min.
2.7
Typ.
Max.
5.5
3
Units
V
mA
µA
50
2
10
0.4
µA
µA
V
0.2
V
OH
V
IL
V
IH
V
REFIN
V
IN
Analog Inputs
RECOMMENDED OPERATING CONDITIONS
Temperature
Voltage
–40ºC to 85ºC.
2.7V to 5.5V
SUMMIT MICROELECTRONICS, Inc.
2033 8.1 10/04/01
3
SMD1102 / 1103 / 1113
PIN DESCRIPTIONS
Serial Clock (SCL)
The SCL input is used to clock data into and out of the
device. In the WRITE mode data must remain stable while
SCL is HIGH. In the READ mode data is clocked out on
the falling edge of SCL.
Serial Data (SDA)
The SDA pin is a bidirectional pin used to transfer data into
and out of the device. Data may change only when SCL
is LOW, except during START and STOP conditions. It is
an open-drain output and may be wire-ORed with any
number of open-drain or open-collector outputs.
SMB
ALERT
#
This interrupt output pin signals the host when an out-of-
limit condition is detected by one of the EEPROM limit
registers. The SMB
ALERT
open-drain output is active low.
REF
IN
Voltage reference input for 10-Bit A/D converter. This
signal is only on the SMD1102 and SMD1113.
A
IN
0, A
IN
1, A
IN
2
Multiplexer input pins for channels 0, 1, and 2, respec-
tively. A
IN
2 is only available on the SMD1103 and
SMD1113. These pins may be left unconnected if they are
not used. However, the Alert Regions must be set
accordingly (see the section "Alert Conditions").
A0, A1, A2
The address inputs are only available on the SMD1113.
Multiple SMD1113s can be used on a single bus by setting
different device addresses. A2 has a 50kΩ pull-up
resistor, and A1 and A0 have 50kΩ pull-down resistors.
Do not set the address to all zeroes because it would
cause a conflict with the SMB Alert Response.
CE#
Chip Enable/disable input must be held low to enable I
2
C
communications. It has a 50kΩ pull-down resistor and is
only available on the SMD1113.
V
DD
Power supply input.
GND
Power supply return.
4
2033 8.1 10/04/01
SUMMIT MICROELECTRONICS, Inc.
SMD1102 / 1103 / 1113
DEVICE OPERATION
The SMD1102, SMD1103 and SMD1113 Data Acquisition
Systems (DAS) are each comprised of: an analog input
multiplexer, sample-and-hold circuit, 10-Bit successive
approximation Analog-to-Digital (A/D) Converter, and
nonvolatile EEPROM memory to store upper and lower
alarm-limits for each input channel. The user programs
the alarm limits via the industry-standard I
2
C interface. An
SMB
ALERT
#
interrupt output signals if any of the analog
inputs move outside these limits.
DAS Modes of Operation
The SMD1102/1103/1113 have four user-selectable
modes of operation. These modes are: a single conver-
sion of one channel, successive conversions on the same
channel, sequential conversions on all three channels, or
autonomous conversions of the same or all channels.
Sample-and-Hold Operation
The channel switching and sampling architecture of the A/
D’s comparator is illustrated in the equivalent input circuit
diagram in Figure 1. During acquisition the selected
channel charges a capacitor in the sample-and-hold cir-
cuit. The acquisition interval spans the Acknowledge
period following the command byte and ends on the rising
edge of the next clock. At the end of the acquisition phase
the analog input is disconnected, retaining charge on the
hold capacitor as a sample of the signal.
Sample
& Hold
+
–
The next bit in the addressing sequence is the EEPROM/
Conversion (E/C) bit; when set to zero the device is
instructed to perform an A/D conversion, and when set to
logic one the EEPROM limit register will be addressed.
See Table 1A.
The next two bits are the channel select bits. Auto-
increment is enabled if the channel select bits are set to
11
BIN
and the conversion bit is set to zero. In the auto-
increment mode conversions are performed on succes-
sive channels, starting with channel 0. After channel 2 is
converted (channel 1 on the SMD1102) the address will
wrap around to channel 0. See Table 1B.
The last bit is the Read/Monitor bit. When the bit is set
to logic one, data can be read from a conversion or from
one of the EEPROM limit registers, depending on the state
of the EEPROM/Conversion bit. When the bit is logic zero
either the auto-monitor mode is entered or the EEPROM
limit register is programmed, again depending on the state
of the EEPROM/Conversion bit. See Table 1C.
DB7 DB6
A2
or
1*
A1
or
0*
DB5
A0
0
or
0*
1
1
DB4
DB3
E/C
Device Type Identifier
Function
Perform A/D con-
version on selected
channel(s)
Address EEPROM
limit register
2033 Table01A
Buffer
Analog In
*
Denotes SMD 1102 & SMD1103. Ax bits are for the SMD1113.
Table 1A. Address Byte — EEPROM/Conversion
DAC
DB7 DB6 DB5 DB4 DB2 DB1
SAR
SDA
Device Type Identifier CH1 CH0
0
2033 Fig01 2.0
Function
Channel 0
selected
Channel 1
selected
Channel 2
selected
Auto-increment if
E/C = 0
2033 Table01B
0
1
0
1
A2
A1
or
0*
A0
0
or
0*
1
1
1
Figure 1. Sample/Hold and SAR
Addressing and Command Sequence
All operations of the DAS are preceded first by the start
condition and then by the addressing command se-
quence. For the SMD1102 & SMD1103 this is 1001
BIN.
For
the SMD1113 it is the binary values of A2, A1, A0, and a
one — a four bit number.
or
1*
*
Denotes SMD 1102 & SMD1103. Ax bits are for the SMD1113.
Table 1B. Address Byte — Channel Select
SUMMIT MICROELECTRONICS, Inc.
2033 8.1 10/04/01
5
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