DM74LS164 8-Bit Serial In/Parallel Out Shift Register
August 1986
Revised April 2000
DM74LS164
8-Bit Serial In/Parallel Out Shift Register
General Description
These 8-bit shift registers feature gated serial inputs and
an asynchronous clear. A low logic level at either input
inhibits entry of the new data, and resets the first flip-flop to
the low level at the next clock pulse, thus providing com-
plete control over incoming data. A high logic level on
either input enables the other input, which will then deter-
mine the state of the first flip-flop. Data at the serial inputs
may be changed while the clock is HIGH or LOW, but only
information meeting the setup and hold time requirements
will be entered. Clocking occurs on the LOW-to-HIGH level
transition of the clock input. All inputs are diode-clamped to
minimize transmission-line effects.
Features
s
Gated (enable/disable) serial inputs
s
Fully buffered clock and serial inputs
s
Asynchronous clear
s
Typical clock frequency 36 MHz
s
Typical power dissipation 80 mW
Ordering Code:
Order Number
DM74LS164M
DM74LS164N
Package Number
M14A
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram
Function Table
Inputs
Clear
L
H
H
H
H
Clock
X
L
↑
↑
↑
A
X
X
H
L
X
B
X
X
H
X
L
Q
A
L
Q
A0
H
L
L
Outputs
Q
B
L
Q
B0
Q
An
Q
An
Q
An
...
...
...
...
...
...
Q
H
L
Q
H0
Q
Gn
Q
Gn
Q
Gn
H
=
HIGH Level (steady state)
L
=
LOW Level (steady state)
X
=
Don't Care (any input, including transitions)
↑ =
Transition from LOW-to-HIGH level
Q
A0
, Q
B0
, Q
H0
=
The level of Q
A
, Q
B
, or Q
H
, respectively, before the
indicated steady-state input conditions were established.
Q
An
, Q
Gn
=
The level of Q
A
or Q
G
before the most recent
↑
transition of the
clock; indicates a one-bit shift.
© 2000 Fairchild Semiconductor Corporation
DS006398
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DM74LS164
Logic Diagram
Timing Diagram
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2
DM74LS164
Absolute Maximum Ratings
(Note 1)
Supply Voltage
Input Voltage
Operating Free Air Temperature Range
Storage Temperature Range
7V
7V
0°C to
+70°C
−65°C
to
+150°C
Note 1:
The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum ratings.
The “Recommended Operating Conditions” tables will define the conditions
for actual device operation.
Recommended Operating Conditions
Symbol
V
CC
V
IH
V
IL
I
OH
I
OL
f
CLK
t
W
t
SU
t
H
t
REL
T
A
Supply Voltage
HIGH Level Input Voltage
LOW Level Input Voltage
HIGH Level Output Current
LOW Level Output Current
Clock Frequency (Note 2)
Pulse Width
(Note 2)
Data Setup Time (Note 2)
Data Hold Time (Note 2)
Clear Release Time (Note 2)
Free Air Operating Temperature
Clock
Clear
0
20
20
17
5
30
0
70
Parameter
Min
4.75
2
0.8
−0.4
8
25
Nom
5
Max
5.25
Units
V
V
V
mA
mA
MHz
ns
ns
ns
ns
°C
Note 2:
T
A
=
25°C and V
CC
=
5V.
Electrical Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Symbol
V
I
V
OH
V
OL
Parameter
Input Clamp Voltage
HIGH Level
Output Voltage
LOW Level
Output Voltage
I
I
I
IH
I
IL
I
OS
I
CC
Input Current @ Max Input Voltage
HIGH Level Input Current
LOW Level Input Current
Short Circuit Output Current
Supply Current
Conditions
V
CC
=
Min, I
I
= −18
mA
V
CC
=
Min, I
OH
=
Max
V
IL
=
Max, V
IH
=
Min
V
CC
=
Min, I
OL
=
Max
V
IL
=
Max, V
IH
=
Min
I
OL
=
4 mA, V
CC
=
Min
V
CC
=
Max, V
I
=
7V
V
CC
=
Max, V
I
=
2.7V
V
CC
=
Max, V
I
=
0.4V
V
CC
=
Max (Note 4)
V
CC
=
Max (Note 5)
−20
16
2.7
3.4
0.35
0.25
0.5
0.4
0.1
20
−0.4
−100
27
mA
µA
mA
mA
mA
Min
Typ
(Note 3)
Max
−1.5
Units
V
V
V
Note 3:
All typicals are at V
CC
=
5V, T
A
=
25°C.
Note 4:
Not more than one output should be shorted at a time, and the duration should not exceed one second.
Note 5:
I
CC
is measured with all outputs OPEN, the SERIAL input grounded, the CLOCK input at 2.4V, and a momentary ground, then 4.5V, applied to the
CLEAR input.
Switching Characteristics
at V
CC
=
5V and T
A
=
25°C
From (Input)
Symbol
f
MAX
t
PLH
t
PHL
t
PHL
Parameter
Maximum Clock Frequency
Propagation Delay Time
LOW-to-HIGH Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
Propagation Delay Time
HIGH-to-LOW Level Output
Clock to Output
Clock to Output
Clear to Output
To (Output)
C
L
=
15 pF
Min
25
27
32
36
30
40
45
Max
R
L
=
2 kΩ
C
L
=
50 pF
Min
Max
MHz
ns
ns
ns
Units
3
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DM74LS164
Physical Dimensions
inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
Package Number M14A
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4
DM74LS164 8-Bit Serial In/Parallel Out Shift Register
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N14A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be rea-
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user.
5
2. A critical component in any component of a life support
device or system whose failure to perform can be rea-
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device or system, or to affect its safety or effectiveness.
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