SPN8439
N-Channel Enhancement Mode MOSFET
DESCRIPTION
The SPN8439 is the N-Channel logic enhancement mode
power field effect transistors are produced using high cell
density , DMOS trench technology.
This high density process is especially tailored to
minimize on-state resistance.
These devices are particularly suited for low voltage
application such as cellular phone and notebook
computer power management and other battery powered
circuits, and low in-line power loss are needed in a very
small outline surface mount package.
FEATURES
30V/6.2A,R
DS(ON)
= 42mΩ@V
GS
=4.5V
30V/5.4A,R
DS(ON)
= 54mΩ@V
GS
=2.5V
Super high density cell design for extremely low
R
DS (ON)
Exceptional on-resistance and maximum DC
current capability
SOT-223 package design
APPLICATIONS
Power Management in Note book
DC/DC Converter
LCD Display inverter
PIN CONFIGURATION(SOT-223)
PART MARKING
2007/07/30
Ver.1
Page 1
SPN8439
N-Channel Enhancement Mode MOSFET
PIN DESCRIPTION
Pin
1
2
3
ORDERING INFORMATION
Part Number
SPN8439S223RG
※
SPN8439S223RG : Tape Reel ; Pb – Free
Package
SOT-223
Part
Marking
8439
Symbol
G
S
D
Description
Gate
Source
Drain
ABSOULTE MAXIMUM RATINGS
(T
A
=25
℃
Unless otherwise noted)
Parameter
Drain-Source Voltage
Gate –Source Voltage
Continuous Drain Current(T
J
=150
℃
)
Pulsed Drain Current
Continuous Source Current(Diode Conduction)
Power Dissipation
Operating Junction Temperature
Storage Temperature Range
Thermal Resistance-Junction to Ambient
T
A
=25℃
T
A
=70℃
T
A
=25℃
T
A
=70℃
Symbol
V
DSS
V
GSS
I
D
I
DM
I
S
P
D
T
J
T
STG
R
θJA
Typical
30
±12
5.8
4.2
25
1.7
2.8
1.2
150
-55/150
90
Unit
V
V
A
A
A
W
℃
℃
℃
/W
2007/07/30
Ver.1
Page 2
SPN8439
N-Channel Enhancement Mode MOSFET
ELECTRICAL CHARACTERISTICS
(T
A
=25
℃
Unless otherwise noted)
Parameter
Static
Drain-Source Breakdown Voltage
Gate Threshold Voltage
Gate Leakage Current
Zero Gate Voltage Drain Current
On-State Drain Current
Drain-Source On-Resistance
Forward Transconductance
Diode Forward Voltage
Dynamic
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Turn-On Time
Turn-Off Time
Symbol
Conditions
Min.
Typ
Max.
Unit
V
(BR)DSS
V
GS
=0V,I
D
=250uA
V
GS(th)
V
DS
=V
GS
,I
D
=250uA
I
GSS
I
DSS
I
D(on)
R
DS(on)
gfs
V
SD
V
DS
=0V,V
GS
=±12V
V
DS
=24V,V
GS
=1.0V
V
DS
=24V,V
GS
=0.0V
T
J
=55℃
V
DS
≧4.5V,V
GS
=4.5V
V
GS
=4.5V,I
D
=6.2A
V
GS
=2.5V,I
D
=5.4A
V
DS
=4.5V,I
D
=5.4A
I
S
=1.7A,V
GS
=0V
30
0.8
1.6
±100
1
10
10
0.034
0.040
12
0.8
0.042
0.054
1.2
V
nA
uA
A
Ω
S
V
Q
g
Q
gs
Q
gd
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
V
DS
=15V
GS
=10V
I
D
≡6.7A
10
1.6
3.2
450
240
38
7
18
nC
V
DS
=15V
GS
=0V
f=1MHz
pF
15
20
40
20
ns
V
DD
=15R
L
=15
I
D
≡1.0A,V
GEN
=10
R
G
=6Ω
10
20
11
2007/07/30
Ver.1
Page 3
微控制器 MCU
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