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Key Features
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SA2532KA/B
SINGLE CHIP
TELEPHONE FOR INDIA
Speech Circuit, LD/MF Dialler and Tone Ringer
on one 28 pin CMOS chip
Low Noise
31 digit Last Number Redial
Line Loss Compensation selectable by pin
option
2 Timed Break Recall keys
Moving Cursor protocol with comparison
On chip MF filter (CEPT CS 203 compatible)
Pause key for auto pause or wait function
Power down mode
Ring frequency discrimination
Selectable Loop-Disconnect or DTMF dialling
modes
Real or complex impedance programmable
Soft Clipping to avoid harsh distortion
Uses inexpensive 3.58MHz ceramic resonator
Operating range from 13 to 100 mA
3 Tone melody generator
General Description
The SA2532K is a CMOS integrated circuit that
contains all the functions needed to form a high
performance electronic telephone.
The device incorporates LD/MF repertory dialling,
melody generation, ring frequency discrimination
and a high quality speech circuit.
Soft switch into temporary MF mode using * when
LD mode is selected .Timed Break Recall will be
available in both LD and MF dialling modes.
A 31 digit Last Number Redial (LNR) memory, with
moving cursor protocol, activated by single key
depression.
Line Loss Compensation whereby send and receive
gains are adjusted (by 6dB) over the ranges
selected by the LLC pin.
Block Diagram
hook
+
LI
LS
STB
+
RI
A
GND
CS
BJT
LINE
CURRENT
SENSE
+
RO1
RO2
+
SA2532K
V
DD
M1
V
DD
V
SS
SOFT
CLIP
M2
MO
MELODY
SEQUENCER
TONE
GENERATOR
MUTE
R4
R3
DIALER
FC1
RING
FREQUENCY
DISCRIMINATION
R2
R1
CONTROL
LOGIC
OSC
RAM
+
HS/DP
MODE
LLC
OSC
MODE_OUT
C1 C2
C3 C4
KEYPAD
+
DAT_SH02
PDS039-SA2532K-001
Rev. C
20-03-00
SA2532KA/B
Pin Description
Pin #
23
24
2
3
5
28
6
1
27
25
Symbol
M1
M2
RO1
RO2
A
GND
RI
STB
LS
LI
CS
Function
Microphone Inputs
Differential inputs for the microphone (electret).
Receiver Outputs
These are the outputs for driving a dynamic ear piece with an impedance of
100 to 300Ohms
Analog Ground
This is the analog ground for the amplifiers.
Receive Input
This is the input for the receive signal.
Side Tone Balance Input
This is the input for side tone cancellation.
Line Current Sense Input
This is the input for sensing the line current.
Line Input
This input is used for power extraction and line current sensing.
Current Shunt Control Output
This N-channel open drain output controls the external high power shunt
transistor for the modulation of the line voltage and for shorting the line
during make period of pulse dialling.
Positive Voltage Supply
This is the supply pin for the circuit.
Negative Power Supply
Melody Output
Pulse Density Modulated output of the melody generator for tone ringer. At
high impedance when not active.
Frequency Comparator Input
This is a Schmitt trigger input for ring frequency discrimination. Disabled
during off-hook.
Hook Switch Input and Dial Pulse Output
This is an I/O that is pulled high by the hook switch when off- hook. An
open drain pulls it low during break periods of pulse dialling and flash.
Oscillator Input
Oscillator pin for Xtal or ceramic resonator (3.58 Mhz). Recommended :
Murata CSA 3.58MG312AM
Mode Output.
An Output pin designed to drive a low power LED. Active whenever MF
dialling mode is selected.
Line Loss Compensation.
Select pin for the line loss compensation:
Open
None
Low
20-50mA
High
45-75mA
4
26
8
V
DD
V
SS
MO
21
FCI
10
HS/DPB
11
OSC
12
MODE
OUT
LLC
9
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SA2532KA/B
Power On Reset
The on chip power on reset circuit monitors the
When V
DD
rises above
supply voltage (V
DD
).
approx. 1.2V, a power on reset occurs to assure
correct start-up and the LNR register is cleared
.
Speech Circuit
The speech circuit consists of a transmit and a
receive path with soft clip, mute, line loss
compensation and side tone cancellation.
Transmit
DC Conditions
The normal operating range is from 15mA to 100
mA. Operating range with reduced performance is
from 5mA to 15mA. In the operating range all
functions are operational. In the line hold range
from 0 to 5 mA the device is in a power down mode
and the voltage at LI is reduced to maximum 3.5V.
The dc characteristic (excluding diode bridge and
Pulsing transistors) is determined by the voltage at
LI and the resistor R1 as follows:
The gain of the transmit path is 35 dB for M1/M2 to
LS (see test circuit in Figure 5). The microphone
input is differential with an input impedance of 25
kOhms. The soft clip circuit limits the output
voltage at LI to 2.0V
PEAK
. The attack time is
30us/6dB and the decay time is 20 ms/6 dB. When
mute is active, during dialling or after pressing the
MUTE key, the gain is reduced by > 60 dB.
Receive
VLS = VLI + ILine.R1
The receive input is the differential signal of RI and
STB. The gain of the receive path is 2 dB (see test
circuit in Figure 5) with differential outputs,
RO1/RO2 . When mute is active during dialling the
gain is reduced by > 60dB. During DTMF dialling a
MF comfort tone is applied to the receiver. The
comfort tone is the DTMF signal with a level that is
-30dB relative to the line signal.
The voltage at LI is 4.5V.
During pulse dialling the speech circuit and other
parts of the device not required are in a power
down mode to save current. The CS pin is pulled to
V
SS
in order to turn the external shunt transistor on
to keep a low voltage drop at the LS pin during
make periods.
Side Tone
Side Tone is controlled along with Return Loss by a
Double Balance Bridge as shown in Figure 3. Good
sidetone cancellation is achieved by using the
following equation:
AC Impedance
The Characteristic or Output impedance of the
SA2532K is set within the IC and adjusted to 600
Ohms. A capacitor may be added to the circuit at
pin CI to add a reactive element and make the
output impedance complex.
R5
Z
bal
------ = ----
R1
Z
line
The side tone cancellation signal is applied to the
STB input.
Oscillator
All the Timing Functions of the SA2532K are based
on a Clock Frequency of 3.58MHz. A ceramic
resonator of this frequency should be connected to
the OSC pin. In practice minor deviations from the
nominal frequency may occur due to the
characteristics of the frequency reference device
used and so it is recommended that care is taken in
the selection of components. Typically a small
value capacitor (
≤
47pF) may be required to be
connected in parallel with the Frequency Reference
to ensure start-up and/or operation at the nominal
frequency.
Line Loss Compensation
The line loss compensation is a pin selectable
option. When it is activated, the gains of the
transmit and receive amplifiers are changed by 6dB
in accord with the DC conditions as measured at
Pins LI and LS. When the LLC pin is low the
adjustment in gain occurs over the range I
LINE
= 20
to 50mA. When the LLC pin is high the gain range
is I
LINE
= 45 to 75mA.. Note that these values apply
for R1 = R30
Ω.
When LLC pin is open then the
amplifier gains remain fixed regardless of the line
current (see figure 6 and figure 7).
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Microchip MCU
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