VITESSE
SEMICONDUCTOR CORPORATION
Preliminary Data Sheet
VSC7928
Features
• Rise Times Less Than 100ps
• High Speed Operation
(Up to 3.2Gb/s NRZ Data)
• Differential or Single-Ended Inputs
• Single Supply
• ECL Compatible Clock and Data Inputs
• Direct Access to Modulation and Bias FETs
• Data Density Monitors
• On-chip Reclocking Register
• On-chip Mux for Clocked or Non-clocked Appli-
cations
• On-chip 50
Ω
Input Termination: Clock and Data
• Enhanced Pinout
SONET/SDH 3.2Gb/s Laser Diode Driver
Applications
• SONET/SDH @ 622Mb/s, 1.244Gb/s,
2.488Gb/s, and 3.125Gb/s
• Full Speed Fibre Channel (1.062Gb/s)
General Description
The VSC7928 is a single 5V supply, 3.2Gb/s laser diode driver with direct access to the laser modulation
and bias FETs. Laser bias and modulation currents are set by external components allowing precision monitor-
ing and setting of the current levels. Data density outputs are provided to allow the user to adjust the laser bias
in high unbalanced data applications. Clock and data inputs are differentially terminated to 50
Ω
.
VSC7928 Block Diagram
MK
NMK
NIOUT
DIN
50
Ω
**
DINTERM*
50
Ω
**
NDIN
DCC
CLK
50
Ω
**
CLKTERM*
50
Ω
**
NCLK
SEL
MIP
*Terminated to Off-chip Capacitor
**On Die Components
MIB
VIB
VIP
I
MOD
I
BIAS
M
U
X
IOUT
D Q
IBIAS
G52246-0, Rev 3.0
04/05/01
©
VITESSE
SEMICONDUCTOR CORPORATION
• 741 Calle Plano • Camarillo, CA 93012
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com
Page 1
VITESSE
SEMICONDUCTOR CORPORATION
Preliminary Data Sheet
SONET/SDH 3.2Gb/s Laser Diode Driver
Table 1: Signal Pin Reference
Signal
DIN, NDIN
MK, NMK
NIOUT
IOUT
VSS
GND
VIP
MIP
VIB
MIB
IBIAS
CLK, NCLK
DINTERM
CLKTERM
DCC
SEL
GND/NC
Total Pins
VSC7928
Description
Data Input and Data Reference, On-chip 50Ω Termination
Data Density Differential Outputs
Laser Modulation Current Output (Complementary)
Laser Modulation Current Output (To Laser Cathode)
Negative Voltage Rail
Positive Voltage Rail
Modulation Gate Node
Modulation Source Node
Bias Gate Node
Bias Source Node
Laser Bias Output (To Laser Cathode)
Clock Input and Clock Reference, On-chip 50Ω Termination
Data Reference
Clock Reference
Duty Cycle Control, Leave Floating
Clk/Non-clk Data Select
No connection (leave floating or connect to GND)
Type
In
Out
Out
Out
Pwr
Pwr
In
In
In
In
Out
In
In
In
In
In
Pwr
Level
ECL
ECL
# Pins
2
2
1
1
2
5/6
(1)
1
1
1
1
1
2
1
1
1
1
7
(1)
24/32
*
—
—
Pwr
Pwr
DC
DC
DC
DC
DC
ECL
DC
DC
DC
DC
DC
—
—
NOTE: (1)
Applicable to 32-pin TQFP package only.
Table 2: Mux Select Logic Table
SEL
V
SS
GND
N/C
Mode Select
Clocked Data In
Non-clocked Data In
Non-clocked Data In
Table 3: Absolute Maximum Ratings
Symbol
V
SS
T
J
T
STG
Rating
Negative Power Supply Voltage
Maximum Junction Temperature
Storage Temperature
Limit
V
CC
to -6.0V
-55°C to + 125°C
-65°C to +150°C
Table 4: Recommended Operating Conditions
Symbol
GND
VSS
T
Cl
T
J
Parameter
Positive Voltage Rail
Negative Voltage Rail
Operational Temperature
(1)
Junction Temperature
Min
—
-5.5
-40
Typ
0
-5.2
Max
—
-4.9
85
(2)
125
Units
V
V
°C
°C
Conditions
—
—
—
Power dissipation = 1.3W
NOTES: (1) Lower limit of specification is ambient temperature and upper limit is case temperature. (2) See section “Calculation of the
Maximum Case Temperature” for detailed maximum temperature calculations.
Page 2
©
VITESSE
SEMICONDUCTOR CORPORATION
• 741 Calle Plano • Camarillo, CA 93012
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com
G52246-0, Rev 3.0
04/05/01
VITESSE
SEMICONDUCTOR CORPORATION
Preliminary Data Sheet
VSC7928
Table 5: High Speed Inputs and ECL Outputs
Symbol
V
IN
V
CM
V
OH
V
OL
V
IN
SONET/SDH 3.2Gb/s Laser Diode Driver
Parameter
Single-ended Input Voltage Swing
Differential Input Common Mode Range
ECL Output High Voltage
ECL Output Low Voltage
On-Chip Terminations
Min
300
-2.3
-1200
Typ
—
—
—
—
—
Max
1500
-1.3
Units
mVp-p
V
mV
mV
Ω
Conditions
V
CM
= -2.0V
V
SS
= -5.2V
50Ω to -2.0V
50Ω to -2.0V
—
-1600
65
—
35
Table 6: Power Dissipation
Symbol
I
VSS
P
D
Parameter
Power Supply Current (VSS)
Total Power Dissipation
Min
—
—
Typ
80
—
Max
120
700
Units
mA
mW
Conditions
V
SS
= -5.5V, I
MOD
= I
BIAS
=
0mA, MK/NMK open circuit
V
SS
= -5.5V, I
MOD
= I
BIAS
=
0mA, R
LOAD
= 25Ω to GND,
MK/NMK terminated 50Ω to -2V
Table 7: Laser Driver DC Electrical Specifications
Symbol
I
BIAS
I
MOD
V
IB
V
IP
V
OCM
Parameter
Programmable Laser Bias Current
Programmable Modulation Current
Laser Bias Control Voltage
Laser Modulation Control Voltage
Output Voltage Compliance
Min
2
2
—
—
Typ
—
—
—
—
GND -
3V
Max
100
100
V
SS
+
2.1
V
SS
+
2.1
—
Units
mA
mA
V
V
V
Conditions
I
BIAS
= 50mA
I
MOD
= 60mA
V
SS
= -5.2V
—
Table 8: Laser Driver AC Electrical Specifications
Symbol
t
R
, t
F
t
SU
t
H
Parameter
Output Rise and Fall Times
Data to Clock Setup Time
Hold Time
Min
—
—
20
Typ
—
50
50
Max
100
Units
ps
ps
ps
Conditions
25Ω load, 20%-80%,
20mA < I
MOD
< 60mA,
I
BIAS
= 60mA
90
—
—
—
G52246-0, Rev 3.0
04/05/01
©
VITESSE
SEMICONDUCTOR CORPORATION
• 741 Calle Plano • Camarillo, CA 93012
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com
Page 3
VITESSE
SEMICONDUCTOR CORPORATION
Preliminary Data Sheet
SONET/SDH 3.2Gb/s Laser Diode Driver
Figure 1: On-Chip Data and Clock Input Configuration
VSC7928
GND
DIN
(CLK)
DINTERM
(CLKTERM)
NDIN
(NCLK)
GND
DATA BUFFER
(CLOCK BUFFER)
X
*
50
*
*
4.0K
6.4K
X
*
50
X
*On-chip
Components
VSS
VSS
DINTERM to -2.0V for Differential ECL Inputs
Figure 2: Single-Ended Operation
7928
DATA
SOURCE
0.1µf
GND
0.1µf
DIN
DINTERM
NDIN
0.1µf
0.1µf
GND
CLOCK
SOURCE
0.1µf
GND
CLK
CLKTERM
NCLK
0.1µf
GND
Page 4
©
VITESSE
SEMICONDUCTOR CORPORATION
• 741 Calle Plano • Camarillo, CA 93012
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com
G52246-0, Rev 3.0
04/05/01
VITESSE
SEMICONDUCTOR CORPORATION
Preliminary Data Sheet
VSC7928
SONET/SDH 3.2Gb/s Laser Diode Driver
Figure 3: Single-Ended AC-Coupled
GND
DIN
(CLK)
0.1µf
SOURCE
DINTERM
(CLKTERM)
X
50
4.0K
-2.0V
50
6.4K
X
X
0.1µf
GND
NDIN
(NCLK)
0.1µf
VSS
GND
Figure 4: Differential AC-Coupled
GND
0.1µf
SOURCE
0.1µf
DIN
(CLK)
X
DINTERM
(CLKTERM)
50
4.0K
-2.0V
X
0.1µf
GND
NDIN
(NCLK)
50
6.4K
X
VSS
Figure 5: Differential DC-Coupled
GND
DIN
(CLK)
X
SOURCE
DINTERM
(CLKTERM)
50
4.0K
-2.0V
X
NDIN
(NCLK)
50
6.4K
X
-2.0V
VSS
G52246-0, Rev 3.0
04/05/01
©
VITESSE
SEMICONDUCTOR CORPORATION
• 741 Calle Plano • Camarillo, CA 93012
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com
Page 5
Linux开发
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
