Part Number 405EZ
Revision 1.27 - August 22, 2007
405EZ
PowerPC 405EZ Embedded Processor
Features
• AMCC PowerPC
®
405 32-bit RISC processor core
operating at up to 416MHz
• On-chip 32-bit peripheral bus (OPB) operating at
up to 83 MHz
• On-chip 64-bit processor local bus (PLB)
operating at up to 166MHz
• 8-bit direct interface for NAND Flash devices
• 32KB of on-chip, high-speed SRAM accessible by
CPU and DMA
• Inter-chip connectivity (SPI and IIC)
Preliminary Data Sheet
• IEEE 1588 Precision Timing Protocol (PTP)
controller
• Chameleon Timer™ and pulse width modulator
(PWM)
• Analog-to-Digital Converter (ADC) with eight
inputs and 10-bit resolution at 300k samples/sec
• Digital-to-Analog Converter (DAC) with one input
and 10-bit resolution at 30M samples/sec
• Two CAN 2.0B protocol and ISO 11898-1
compliant channels
• Two serial ports (16750 compatible UART)
• External 8-,16-, or 32-bit peripheral bus (EBC)
operating at up to 83MHz
• Boot from IIC bootstrap controller, EBC, NAND
Flash, and SPI
• DMA support for all on-chip slaves and external
bus, including on-chip SRAM, ADC, DAC, UARTs,
and devices on the external peripheral bus
• One 10/100 Mbps Ethernet MII interface (half- and
full-duplex) to external PHY
• Three USB 1.1 ports: two Host and one Device
with Full-Speed on-chip PHYs
• Programmable universal interrupt controller (UIC)
• One IIC interface operating at up to 400kHz and
supporting all standard IIC EEPROMs
• One SPI (SCP) synchronous full-duplex channel
operating at up to 40 MHz
• 54 general purpose I/Os (GPIOs), each with
programmable interrupts and outputs
• Supports JTAG for board-level testing
• System power management, low power
dissipation and small form factor
• RoHS compliant (lead-free)
Description
With speeds up to 416MHz, a flexible on-chip and off-
chip memory architecture, a combination of an ADC, a
DAC, a programmable Chameleon Timer/PWM, an
IEEE 1588 PTP, and a diverse communications
package that includes USB 1.1, Ethernet, and CAN,
the PowerPC 405EZ embedded processor provides a
low power and small footprint system-on-a-chip
solution for a wide range of high performance, cost-
constrained embedded applications. This includes
industrial control, high-precision AC/DC and servo
drive control, instrumentation, data acquisition,
industrial automation, building and enclosure
management, commercial and retail systems, Internet
AMCC Proprietary
appliances, and intelligent USB peripherals. It is an
easily programmable general purpose, 32-bit RISC
controller that offers an upgrade path for applications
in need of performance and connectivity
improvements.
Technology: CU-11 CMOS, 130nm
Package: 324-ball, 23 mm×23 mm, lead-free, plastic
ball grid array (EPBGA), 1mm ball pitch
Typical Power (Est.): 1.05W @ 166 MHz;1.48W @
416 MHz
1
PPC405EZ – PowerPC 405EZ Embedded Processor
Revision 1.27 - August 22, 2007
Preliminary Data Sheet
Table of Contents
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
List of Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
List of Tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Ordering, PVR, and JTAG Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Address Maps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Power PC 405 Processor Core . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Internal Buses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
On-Chip Memory (OCM) Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
External Bus Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
NAND Flash Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
DMA Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
USB Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Controller Area Network (CAN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
UART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
IIC Bus Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Serial Peripheral Interface (SPI/SCP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Chameleon Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
General Purpose I/O (GPIO) Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Universal Interrupt Controller (UIC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
10/100 Ethernet . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
IEEE 1588 Precision Timing Protocol Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Analog-to-Digital Converter (ADC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Digital-to-Analog Converter (DAC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
JTAG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Signal Lists . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Signal Functional Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Ratings and Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Spread Spectrum Clocking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
2
AMCC Proprietary
PPC405EZ – PowerPC 405EZ Embedded Processor
Revision 1.27 - August 22, 2007
Preliminary Data Sheet
List of Figures
Figure 1. PPC405EZ Embedded Controller Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. 23mm, 324-Ball EPBGA Core . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 3. Clocking Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Figure 4. Input Setup and Hold Timing Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Figure 5. Output Delay and Float Timing Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
List of Tables
Table 1. System Memory Address Map (4GB System Memory) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 2. DCR Address Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 3. Signals Listed Alphabetically . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 4. Signals Listed by Ball Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Table 5. Pin Groups . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Table 6. Signal Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Table 7. Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Table 8. Package Thermal Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Table 9. Recommended DC Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Table 10. Input Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Table 11. Typical DC Power Supply Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Table 12. DC Power Supply Loads . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Table 13. System Clocking Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Table 14. Peripheral Interface I/O Clock Timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Table 15. I/O Specifications—All CPU Speeds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Table 16. I/O Specifications—416 MHz CPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Table 17. Strapping Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
AMCC Proprietary
3
PPC405EZ – PowerPC 405EZ Embedded Processor
Revision 1.27 - August 22, 2007
Preliminary Data Sheet
Ordering, PVR, and JTAG Information
This section provides the part number nomenclature. For availability, contact your local AMCC sales office.
Order Part Number
(see Notes:)
PPC405EZ-CSAfffTx
Rev
Level
A
Product Name
PPC405EZ
Notes:
1.
2.
3.
4.
Package
23mm, 324-ball, EPBGA
PVR Value
0x41511460
JTAG ID
0x0405A1E1
C = CAN enabled
S = Lead-free EPBGA package (RoHS compliant)
A = Chip revision level A
fff = Processor frequency
166 = 166MHz
266 = 266MHz
333 = 333MHz
416 = 416MHz
5. T = Case temperature range, -40°C to +105°C
6. x = Shipping package type
Z = tape-and-reel
blank = tray
The part number contains a part modifier. Included in the modifier is a revision code. This refers to the die mask
revision number and is specified in the part numbering scheme for identification purposes only.
The PVR (Processor Version Register) and the JTAG ID register are software accessible (read-only) and contain
information that uniquely identifies the part. See the
PPC405EZ Embedded Processor User’s Manual
for details
about accessing these registers.
Order Part Number Key
PPC405EZ-CSA416TZ
Shipping Package
AMCC Part Number
Case Temperature Range
Processor Speed (MHz)
CAN enabled
Package
Revision Level
Note:
The example P/N above is CAN enabled, lead-free, capable of running at 416MHz, and is
shipped in tape-and-reel packaging.
4
AMCC Proprietary
PPC405EZ – PowerPC 405EZ Embedded Processor
Revision 1.27 - August 22, 2007
Preliminary Data Sheet
Block Diagram
Figure 1. PPC405EZ Embedded Controller Functional Block Diagram
Universal
Interrupt
Controller
Clock
Control
Reset
Power
Mgmt
32KB
SRAM
Timers
MMU
PowerPC
405 Core
JTAG
D-OCM
I-OCM
DCRs
OCM
Ctrl
UART
x2
Arbiter
On-chip Peripheral Bus (OPB)
CAN
x2
IIC/
BSC
SPI
GPIO Timer/ DAC
(SCP)
PWM
ADC
DCR
Bus
Trace
16KB D-Cache 16KB I-Cache
DMA
Controller
(4-Channel)
OPB/PLB
Bridges
MAL
Ethernet
10/100
USB 1.1
Host/Dev
IEEE
1588
PTP
Arbiter
Processor Local Bus (PLB) 64 bit, PLB3
PHY
External
Bus
Controller
NAND
Flash
Controller
MII
The PPC405EZ is designed using the IBM Microelectronics Blue Logic
TM
methodology in which major functional
blocks are integrated together to create an application-specific ASIC product. This approach provides a consistent
way to create complex ASICs using IBM CoreConnect
TM
Bus Architecture.
AMCC Proprietary
5
微控制器 MCU
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