HOME LAN NETWORKING & 10 /100 –T XFMER
P/N: HR003X: APPLY TO SIS 540/630 ALL IN ONE CHIP
A.GENERAL SPECIFICATIONS:
1. DESIGN FOR HOME LAN NETWORKING PHONELINE & ETHERNET.
2. SUPPORTS TUT SYSTEM HOME LAN TECHNOLOGY.
3. SURFACE MOUNTABLE.
4. INTEGRATED 10/100 BASE-T TRANSMIT & RECIVE ISOLATION & EMI FILTER.
B.ELECTRICAL SPECIFICATIONS @ 25°C:
°
1. ISOLATION HI-POT: 1500 VRMS (PRI. /SEC.)
2. 10/100 BASE-T TURN RATIO (+/- 5%): TX=1CT: 1CT, RX=1CT: 1CT
3. INDUCTANCE (uH ):
TX& RX=550(MIN)
4. INTERWINDING CAPACITANCE (PF): TX & RX=25(MAX)
5. DC RESISTANCE (Ω):
TX& RX=1.0(MAX)
6. CW/W (PF):
@100KHz/0.2V=30 (MAX)
7. LEKAGE INDUTANCE(uH):
100 KHz/0.2V=0.42(MAX)
8. RETURN LOSS@1-80 MHz:
TX& RX=-10(dB MIN)
C.SCHEMATIC& DIMENSIONS & MARKING (unit mm):
Date: Apr-21-2000 Pre.by: PiJunMin Rev:2.0
FPGA/CPLD
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