®
TN12, TS12 and TYNx12 Series
12A SCR
S
A
SENSITIVE & STANDARD
Table 1: Main Features
Symbol
I
T(RMS)
V
DRM
/V
RRM
I
GT
Value
12
600 to 1000
0.2 to 15
Unit
A
V
mA
A
G
K
A
DESCRIPTION
Available either in sensitive
(TS12)
or standard
(TN12 / TYN)
gate triggering levels, the 12A SCR
series is suitable to fit all modes of control, found
in applications such as overvoltage crowbar
protection, motor control circuits in power tools
and kitchen aids, inrush current limiting circuits,
capacitive discharge ignition and voltage
regulation circuits...
Available in through-hole or surface-mount
packages, they provide an optimized performance
in a limited space area.
K A
G
K A
G
DPAK
(TN12-B / TS12-B)
A
D
2
PAK
(TN12-G)
A
K
A
K
G
A
G
IPAK
(TN12-H / TS12-H)
TO-220AB
(TYNx12RG)
Table 2: Order Codes
Part Numbers
TN1215-x00B
TN1215-x00B-TR
TN1215-x00G
TN1215-x00G-TR
TN1215-x00H
TS1220-x00B
TS1220-x00B-TR
TS1220-x00H
TYNx12RG
TYNx12TRG
Marking
TN1215x00
TN1215x00
TN1215x00G
TN1215x00G
TN1215x00
TS1220x00
TS1220x00
TS1220x00
TYNx12
TYNx12T
October 2005
REV. 5
1/11
TN12, TS12 and TYNx12 Series
Table 3: Absolute Ratings
(limiting values)
Value
Symbol
Parameter
TN12-G
TYN12
T
c
= 105°C
T
c
= 105°C
T
j
= 25°C
T
j
= 25°C
T
j
= 125°C
T
j
= 125°C
T
j
= 125°C
145
140
98
50
4
1
- 40 to + 150
- 40 to + 125
5
TN12-B/H
TS12-B/H
12
8
115
110
60
A
A
2S
A/µs
A
W
°C
V
Unit
I
T(RMS)
IT
(AV)
I
TSM
I
²
t
dI/dt
I
GM
P
G(AV)
T
stg
T
j
V
RGM
RMS on-state current (180° conduction angle)
Average on-state current (180° conduction
angle)
Non repetitive surge peak on-
state current
I
²
t Value for fusing
t
p
= 8.3 ms
t
p
= 10 ms
t
p
= 10 ms
A
A
Critical rate of rise of on-state
current I
G
= 2 x I
GT
, t
r
≤
100 ns F = 60 Hz
Peak gate current
Average gate power dissipation
Storage junction temperature range
Operating junction temperature range
t
p
= 20 µs
Maximum peak reverse gate voltage (for
TN12
&
TYN12
only)
Tables 4: Electrical Characteristics
(T
j
= 25°C, unless otherwise specified)
■
SENSITIVE
Test Conditions
V
D
= 12 V
V
D
= V
DRM
I
RG
= 10 µA
I
T
= 50 mA
I
G
= 1 mA
R
GK
= 1 kΩ
R
GK
= 1 kΩ
R
GK
= 220
Ω
T
j
= 125°C
T
j
= 25°C
T
j
= 125°C
T
j
= 125°C
T
j
= 25°C
T
j
= 125°C
R
L
= 140
Ω
R
L
= 3.3 kΩ
R
GK
= 1 kΩ
T
j
= 125°C
MAX.
MAX.
MIN.
MIN.
MAX.
MAX.
MIN.
MAX.
MAX.
MAX.
MAX.
2
mA
TS1220
200
0.8
0.1
8
5
6
5
1.6
0.85
30
5
Unit
µA
V
V
V
mA
mA
V/µs
V
V
mΩ
µA
Symbol
I
GT
V
GT
V
GD
V
RG
I
H
I
L
dV/dt
V
TM
V
t0
R
d
I
DRM
I
RRM
V
D
= 65 % V
DRM
I
TM
= 24 A
tp = 380 µs
Threshold voltage
Dynamic resistance
V
DRM
= V
RRM
R
GK
= 220
Ω
2/11
TN12, TS12 and TYNx12 Series
■
STANDARD
Test Conditions
MIN.
V
D
= 12 V
V
D
= V
DRM
I
T
= 500 mA
I
G
= 1.2 I
GT
V
D
= 67 % V
DRM
I
TM
= 24 A
Threshold voltage
Dynamic resistance
V
DRM
= V
RRM
Gate open T
j
=125°C
T
j
= 25°C
T
j
= 125°C
T
j
= 125°C
T
j
= 25°C
T
j
= 125°C
t
p
= 380 µs
R
L
= 33
Ω
R
L
= 3.3 kΩ
Gate open
T
j
= 125°C
MAX.
MAX.
MIN.
MAX.
MAX.
MIN.
MAX.
MAX.
MAX.
MAX.
40
80
200
1.6
0.85
30
5
2
30
60
TN1215
B/H
2
15
1.3
0.2
15
30
40
30
60
200
G
0.5
5
TYN
x12T
x12
2
15
Unit
mA
V
V
mA
mA
V/µs
V
V
mΩ
µA
mA
Symbol
I
GT
V
GT
V
GD
I
H
I
L
dV/dt
V
TM
V
t0
R
d
I
DRM
I
RRM
Table 6: Thermal resistance
Symbol
R
th(j-c)
Junction to case (DC)
S = 0.5 cm
²
R
th(j-a)
Junction to ambient (DC)
S = 1 cm
²
DPAK
D
2
PAK
IPAK
TO-220AB
S = Copper surface under tab.
Parameter
Value
1.3
70
45
100
60
Unit
°C/W
°C/W
Figure 1: Maximum average power dissipation
versus average on-state current
P(W)
12
11
10
9
8
7
6
5
4
3
2
1
0
0
1
2
3
4
5
6
7
360°
α
= 180°
Figure 2: Average and D.C. on-state current
versus case temperature
I
T(AV)
(A)
14
D.C.
12
10
α
= 180°
8
6
4
2
I
T(AV)
(A)
α
8
9
T
case
(°C)
0
0
25
50
75
100
125
3/11
TN12, TS12 and TYNx12 Series
Figure 3: Average and D.C. on-state current
versus ambient temperature (device mounted
on FR4 with recommended pad layout) (DPAK)
I
T(AV)
(A)
3.0
2.5
D.C.
Figure 4: Relative variation of thermal
impedance junction to case versus pulse
duration
K=[Z
th(j-c)
/R
th(j-c)
]
1.0
2.0
1.5
α
= 180°
D
2
PAK
0.5
1.0
0.5
DPAK
0.2
T
amb
(°C)
0.0
0
25
50
75
100
125
t
p
(s)
0.1
1E-3
1E-2
1E-1
1E+0
Figure 5: Relative variation of thermal
impedance junction to ambient versus pulse
duration (recommended pad layout, FR4 PC
board for DPAK)
K=[Z
th(j-a)
/R
th(j-a)
]
1.00
Figure 6: Relative variation of gate trigger
current and holding current versus junction
temperature for TS8 series
I
GT
,I
H
,I
L
[T
j
] / I
GT
,I
H
,I
L
[T
j
=25°C]
2.0
1.8
1.6
DPAK
I
GT
1.4
D
2
PAK
1.2
TO-220AB / IPAK
0.10
1.0
0.8
0.6
0.4
I
H
& I
L
R
GK
= 1k
Ω
t
p
(s)
0.01
1E-2
1E-1
1E+0
1E+1
1E+2
5E+2
0.2
0.0
-40
-20
0
20
T
j
(°C)
40
60
80
100
120
140
Figure 7: Relative variation of gate trigger
current and holding current versus junction
temperature for TN8 & TYN08 series
I
GT
,I
H
,I
L
[T
j
] / I
GT
,I
H
,I
L
[T
j
=25°C]
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
-40
-20
0
20
40
60
80
100
120
140
I
H
& I
L
I
GT
Figure 8: Relative variation of holding current
versus gate-cathode resistance (typical
values) for TS8 series
I
H
[R
GK
] / I
H
[R
GK
=1k
Ω
]
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
T
j
= 25°C
T
j
(°C)
0.5
0.0
1E-2
1E-1
R
GK
(k
Ω
)
1E+0
1E+1
4/11
TN12, TS12 and TYNx12 Series
Figure 9: Relative variation of dV/dt immunity
versus gate-cathode resistance (typical
values) for TS8 series
dV/dt[R
GK
] / dV/dt[R
GK
=220
Ω
]
10.0
T
j
= 125°C
V
D
= 0.67 x V
DRM
Figure 10: Relative variation of dV/dt immunity
versus gate-cathode capacitance (typical
values) for TS8 series
dV/dt[C
GK
] / dV/dt[R
GK
=220
Ω
]
4.0
3.5
3.0
2.5
V
D
= 0.67 x V
DRM
T
j
= 125°C
R
GK
= 220
Ω
1.0
2.0
1.5
1.0
R
GK
(k
Ω
)
0.1
0
200
400
600
800
1000
1200
0.5
0.0
0
25
50
C
GK
(nF)
75
100
125
150
Figure 11: Surge peak on-state current versus
number of cycles
Figure 12: Non-repetitive surge peak on-state
current for a sinusoidal pulse with width
tp < 10 ms, and corresponding values of I²t
I
TSM
(A), I
2
t (A
2
s)
2000
T
j
initial = 25°C
I
TSM
(A)
150
140
130
120
110
100
90
80
70
60
50
40
30
20
10
0
1
1000
TN12 / TYN12
Non repetitive
T
j
initial=25°C
TS12
t
p
=10ms
One cycle
I
TSM
TN12 / TYN12
TS12
dI/dt limitation
100
It
2
TN12 / TYN12
TS12
Repetitive
T
C
=105°C
Number of cycles
10
t
p
(ms)
0.01
0.10
1.00
10.00
10
100
1000
Figure 13: On-state characteristics (maximum
values)
Figure 14: Thermal resistance junction to
ambient versus copper surface under tab
(epoxy printed circuit board FR4, copper
thickness: 35µm) (DPAK and D
2
PAK)
R
th(j-a)
(°C/W)
100
I
TM
(A)
200
100
T
j
max.:
V
t0
=0.85V
R
d
=30m
Ω
80
60
T
j
=max
DPAK
10
T
j
=25°C
40
D
2
PAK
20
V
TM
(V)
1
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
0
0
2
4
6
8
S(cm²)
10
12
14
16
18
20
5/11
嵌入式系统
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