®
TN805/TN815-B
SCR’s
FEATURES
I
TRMS
= 8 A
V
DRM
= 400 V to 800 V
I
GT
≤
5 mA and 15 mA
DESCRIPTION
The TN805/TN815-B serie of Silicon Controlled
Rectifiers uses a high performance TOPGLASS
PNPN technology.
These parts are intended for general purpose
applications using mount technology.
K
A
A
G
DPAK
ABSOLUTE MAXIMUM RATINGS
Symbol
I
T(RMS)
I
T(AV)
I
TSM
Parameter
RMS on-state current
(180° conduction angle)
Mean on-state current
(180° conduction angle)
Non repetitive surge peak on-state current
(Tj initial = 25°C)
Tc= 105°C
Tc= 105°C
tp = 8.3 ms
tp = 10 ms
I
2
t
dI/dt
T
stg
T
j
Tl
I
2
t Value for fusing
Critical rate of rise of on-state current
dI
G
/dt = 1 A/µs.
I
G
= 100 mA
Storage junction temperature range
Operating junction temperature range
Maximum lead temperature for soldering during 10s
tp = 10ms
Value
8
5
73
70
24.5
100
- 40 to + 150
- 40 to + 125
260
A
2
s
A/µs
°C
°C
Unit
A
A
A
Symbol
V
DRM
V
RRM
Parameter
400B
Repetitive peak-off voltage
Tj = 125°C
400
TN805 or TN815
600B
600
700B
700
800B
800
Unit
V
August 1998 - Ed: 1A
1/5
TN805/TN815-B
THERMAL RESISTANCES
Symbol
Rth(j-a)
Rth(j-c)
Parameter
Junction to ambient (S=0.5cm
2
)
Junction to case for D.C
Value
70
2.5
Unit
°C/W
°C/W
GATE CHARACTERISTICS
P
G (AV)
= 1W P
GM
= 10 W (tp = 20
µs)
I
GM
= 4 A (tp = 20
µs)
V
RGM
= 5 V
ELECTRICAL CHARACTERISTICS
Symbol
I
GT
V
GT
V
GD
tgt
I
H
I
L
V
TM
I
DRM
I
RRM
dV/dt
Test Conditions
V
D
= 12V (DC) R
L
= 33Ω
V
D
= 12V (DC) R
L
= 33Ω
V
D
= V
DRM
R
L
= 3.3kΩ
V
D
= V
DRM
I
G
= 40mA
I
T
= 150mA
I
G
= 1.2 I
GT
I
TM
= 16A tp= 380µs
VDRM Rated
VRRM Rated
Linear slope up to
V
D
=67%V
DRM
Gate open
I
TM
= 3 x I
T(AV)
dIG/dt = 0.5A/us
Gate open
Tj= 25°C
Tj= 25°C
Tj= 125°C
Tj= 25°C
Tj= 25°C
Tj= 25°C
Tj= 25°C
Tj= 25°C
Tj = 125°C
Tj= 125°C
Type
MAX
MAX
MIN
TYP
MAX
MAX
MAX
MAX
MAX
MIN
50
25
25
1.6
10
2
150
5
1.5
0.2
2
30
30
Value
TN805
TN815
15
µA
V
V
µs
mA
mA
V
µA
mA
V/µs
Unit
ORDERING INFORMATION
TN
SCR
CURRENT
2/5
8
05 - 600
SENSITIVITY
B
PACKAGES :
B: DPAK
V
DRM
/ V
RRM
TN805/815-B
Fig. 1:
Maximum average power dissipation ver-
sus average on-state current .
Fig. 2 :
Correlation between maximum average
power dissipation and maximum allowable
tem-
peratures (T
amb
and T
case
) for different thermal
resistances heatsink+contact.
P(W)
8
7
6
5
4
3
2
1
0
0
1
2
IT(av)(A)
3
4
5
α
360°
α
= 180°
α
= 120°
α
= 90°
α
= 60°
α
= 30°
D.C.
P(W)
8
7
6
5
4
Rth=37°C/W
Tcase (°C)
105
Rth=0°C/W
α
= 180°
110
115
120
3
2
1
0
Tamb(°C)
0
10 20 30 40 50 60 70 80 90 100 110 120 130
125
6
7
Fig. 3-1:
Average and D.C. on-state current versus
case temperature.
Fig. 3-2:
Average and D.C. on-state current versus
case temperature.
IT(av)(A)
10
D.C.
IT(av)(A)
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
8
6
4
2
Tcase(°C)
0
0
10 20 30 40 50 60 70 80 90 100 110 120 130
α
= 180°
D.C.
α
= 180°
Tamb(°C)
0
10 20 30 40 50 60 70 80 90 100 110 120 130
Fig. 4-1:
Relative variation of thermal impedance
versus pulse duration.
Fig. 4-2:
Relative variation of thermal impedance
versus pulse duration.
K=[Zth(j-c)/Rth(j-c)]
1.0
K=[Zth(j-a)/Rth(j-a)]
1.00
0.5
0.10
0.2
tp(s)
0.1
1E-3
1E-2
1E-1
1E+0
tp(s)
0.01
1E-2
1E-1
1E+0
1E+1
1E+2
5E+2
3/5
TN805/TN815-B
Fig. 5:
Relative variation of gate trigger current and
holding current versus junction temperature.
Fig. 6:
Non repetitive surge peak on-state current
versus number of cycles.
Igt,IH[Tj]/Ig,IH[Tj=25°C]
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
-40
80
Igt
ITSM(A)
70
60
50
Tj initial=25°C
F=50Hz
IH
40
30
20
10
Tj(°C)
-20
0
20
40
60
80
100
120
Number of cycles
1
10
100
1000
0
Fig. 7:
Non repetitive surge peak on-state current
for a sinusoidal pulse with width tp<10ms, and cor-
responding value of I2t.
Fig. 8:
On-state characteristics (maximum values).
ITSM(A),I²t(A²s)
300
Tj initial=25°C
ITSM
ITM(A)
100.0
Tj max.:
Vto=0.85V
Rt=46m
100
50
I²t
10.0
Tj=Tj max.
Tj=25°C
1.0
20
tp(ms)
10
1
2
5
10
VTM(V)
0.1
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
Fig. 9:
Thermal resistance junction to ambient ver-
sus copper surface under tab (Epoxy printed circuit
board FR4, copper thickness: 35µm).
Rth(j-a) (°C/W)
100
80
60
40
20
S(Cu) (cm²)
0
0
2
4
6
8
10
12
14
16
18
20
4/5
TN805/815-B
PACKAGE MECHANICAL DATA
DPAK
DIMENSIONS
REF.
A
A1
A2
B
B2
C
C2
D
E
G
H
L2
L4
V2
0.60
0°
Millimeters
Min. Typ.
2.20
0.90
0.03
0.64
5.20
0.45
0.48
6.00
6.40
4.40
9.35
0.80
1.00 0.023
8°
0°
Max
2.40 0.086
1.10 0.035
0.23 0.001
0.90 0.025
5.40 0.204
0.60 0.017
0.60 0.018
6.20 0.236
6.60 0.251
4.60 0.173
10.10 0.368
0.031
0.039
8°
Inches
Min. Typ. Max.
0.094
0.043
0.009
0.035
0.212
0.023
0.023
0.244
0.259
0.181
0.397
FOOT PRINT DIMENSIONS
(in millimeters)
6.7
WEIGHT :
0.30g
MARKING
TYPE
MARKING
TN8
05x0
TN8
15x0
6.7
T805- x00B
T815-x00B
6.7
3
1.6
2.3
2.3
1.6
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsIbility for the consequences of
use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by
implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to
change without notice. This publication supersedes and replaces all information previously supplied.
STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written ap-
proval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
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