HB28C048A6/HB28C032A6
HB28C016A6
FLASH ATA Card
48 MByte/32 MByte/16 MByte
ADE-203-1190A (Z)
Rev. 1.0
Dec. 1, 2000
Description
HB28C048A6, HB28C032A6, HB28C016A6 are Flash ATA card. This card complies with PC card ATA
standard and is suitable for the usage of data storage memory medium for PC or any other electric equipment.
This card is equipped with Hitachi 128 Mega bit Flash memory. This card is suitable for ISA (Industry
Standard Architecture) bus interface standard, and read/write unit is 1 sector (512 bytes) sequential access.
By using this card it is possible to operate good performance for the system which have PC card slots.
Features
•
PC card ATA standard specification
68 pin two pieces connector and Type II (5 mm)
•
3.3 V/5 V single power supply operation
•
ISA standard and Read/Write unit is 512 bytes (sector) sequential access
Sector Read/Write transfer rate: 8MB/sec burst
•
Card density is 48 Mega bytes maximum
This card is equipped Hitachi 128 Mega bit Flash memory
•
3 variations of mode access
Memory card mode
I/O card mode
True IDE mode
•
Internal self-diagnostic program operates at V
CC
power on
•
High reliability based on internal ECC (Error Correcting Code) function
•
Data reliability is 1 error in 10
–14
bits read.
•
Auto Sleep Function
HB28C048/032/016A6
Card Pin Explanation
Signal name
Direction Pin No.
Description
A10 to A0
I
(PC Card Memory mode)
A10 to A0
(PC Card I/O mode)
A2 to A0
(True IDE mode)
BVD1
I/O
(PC Card Memory mode)
-STSCHG
(PC Card I/O mode)
-PDIAG
(True IDE mode)
BVD2
I/O
(PC Card Memory mode)
-SPKR
(PC Card I/O mode)
-DASP
(True IDE mode)
-CD1, -CD2
O
(PC Card Memory mode)
-CD1, -CD2
(PC Card I/O mode)
-CD1, -CD2
(True IDE mode)
-CE1, -CE2
I
(PC Card Memory mode)
Card Enable
-CE1, -CE2
(PC Card I/O mode)
Card Enable
-CE1, -CE2
(True IDE mode)
-CE2 is used for select the Alternate Status Register
and the Device Control Register while -CE1 is the chip
select for the other task file registers.
7, 42
-CE1 and -CE2 are low active card select signals.
Byte/Word/Odd byte mode are defined by combination
of -CE1, -CE2 and A0.
36, 67
62
27, 28, 29
63
Address bus is A10 to A0. Only A2 to A0 are used,
A10 to A3 should be grounded by the host.
BVD1 outputs the battery voltage status in the card.
This output line is constantly driven to a high state
since a battery is not required for this product.
-STSCHG is used for changing the status of
Configuration and status register in attribute area.
-PDIAG is the Pass Diagnostic signal in Master/Slave
handshake protocol.
BVD2 outputs the battery voltage status in the card.
This output line is constantly driven to a high state
since a battery is not required for this product.
-SPKR outputs speaker signals. This output line is
constantly driven to a high state since this product
does not support the audio function.
-DASP is the Disk Active/Slave Present signal in the
Master/Slave handshake protocol.
-CD1 and -CD2 are the card detection signals. -CD1
and -CD2 are connected to ground in this card, so
host can detect that the card is inserted or not.
8, 11, 12, 22, 23, Address bus is A10 to A0. A10 is MSB and A0 is
24, 25, 26, 27,
LSB.
28, 29
5
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