Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on
A B S O L U T E M A X I M U M R A T I N G S
(Note 1)
SYMBOL
PARAMETER
Value
+/- 40
6
-0.3V to (V5+0.3V)
VNN+13
-55º to 150º
-40º to 85º
150º
4000
1500
200
UNITS
V
V
V
V
C
C
C
V
V
V
VPP, VNN
Supply Voltage (VPP1, VPP2, VNN1, VNN2)
Positive 5V Bias Supply
V5
VN10
T
STORE
T
A
T
J
ESD
HB
ESD
MM
Storage Temperature Range
Voltage at Input Pins (pins 18, 19, 23, 24, 26, 28-32)
Voltage for low-side FET drive
Operating Free-air Temperature Range (Note 2)
Junction Temperature
ESD Susceptibility – Human Body Model (Note 3)
All pins (except pin 27)
Pin 27
ESD Susceptibility – Machine Model (Note 4)
All pins
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.
See the table below for Operating Conditions.
Note 2: This is a target specification. Characterization is still needed to validate this temperature range.
Note 3: Human body model, 100pF discharged through a 1.5K: resistor.
Note 4: Machine model, 220pF – 240pF discharged through all pins.
O P E R A T I N G C O N D I T I O N S
(Note 5)
SYMBOL
VPP, VNN
V5
VN10
Positive 5 V Bias Supply
Voltage for FET drive (Volts above VNN)
PARAMETER
Supply Voltage (VPP1, VPP2, VNN1, VNN2)
MIN.
+/- 12
4.5
9
TYP.
+/-31
5
11
MAX.
+/- 36
5.5
12
UNITS
V
V
V
Note 5: Recommended Operating Conditions indicate conditions for which the device is functional.
See Electrical Characteristics for guaranteed specific performance limits.
THERMAL CHARACTERISTICS
SYMBOL
T
JC
T
JA
PARAMETER
Junction-to-case Thermal Resistance
Junction-to-ambient Thermal Resistance (still air)
VALUE
1.0q
20q
UNITS
C/W
C/W
2
TA2022 – KLI/1.2/07-04
Tr i path Technol ogy, I nc. - Techni cal I nfor m ati on
E X T E R N A L C O M P O N E N T S D E S C R I P T I O N
(Refer to the Application/Test Circuit)
Components
Description
Inverting input resistance to provide AC gain in conjunction with R
F
. This input is biased
at the BIASCAP voltage (approximately 2.5VDC).
Feedback resistor to set AC gain in conjunction with R
I
. Please refer to the Amplifier
Gain paragraph, in the Application Information section.
AC input coupling capacitor which, in conjunction with R
I
, forms a high pass filter at
f
C
1 (2SR
I
C
I
)
.
Feedback divider resistor connected to V5. This resistor is normally set at 1k: .
Feedback divider resistor connected to AGND. This value of this resistor depends on
the supply voltage setting and helps set the TA2022 gain in conjunction with R
I,
R
F,
R
FBA,
and R
FBC
. Please see the Modulator Feedback Design paragraphs in the Application
Information Section.
Feedback resistor connected from either the OUT1(OUT2) to FBKOUT1(FBKOUT2) or
speaker ground to FBKGND1(FBKGND2). The value of this resistor depends on the
supply voltage setting and helps set the TA2022 gain in conjunction with R
I,
R
F,
R
FBA,
, and
R
FBB
. It should be noted that the resistor from OUT1(OUT2) to FBKOUT1(FBKOUT2)
must have a power rating of greater than
P
DISS
VPP
2
(2R
FBC
)
. Please see the Modulator
Feedback Design paragraphs in the Application Information Section.
Feedback delay capacitor that both lowers the idle switching frequency and filters very
high frequency noise from the feedback signal, which improves amplifier performance.
The value of C
FB
should be offset between channel 1 and channel 2 so that the idle
switching difference is greater than 40kHz. Please refer to the Application / Test Circuit.
Potentiometer used to manually trim the DC offset on the output of the TA2022.
Resistor that limits the manual DC offset trim range and allows for more precise
adjustment.
Bias resistor. Locate close to pin 17 and ground at pin 20.
BIASCAP decoupling capacitor. Should be located close to pin 27 and grounded at pin 20.
Bootstrap diode. This diode charges up the bootstrap capacitors when the output is low
(at VNN) to drive the high side gate circuitry. Schottky or fast recovery diode rated at
least 200mA, 90V, 50nS is recommended for the bootstrap circuitry. In addition, the
bootstrap diode must be able to sustain the entire VPP-VNN voltage. Thus, for most
applications, a 90V (or greater) diode should be used.
High frequency bootstrap capacitor, which filters the high side gate drive supply. This
capacitor must be located as close to pin 13 (VBOOT1) or pin1n (VBOOT2) for reliable
operation. The other side of C
B
should be connected directly to the OUT1 (pin 10) or
OUT2 (pin 7). Please refer to the Application / Test Circuit.
Bulk bootstrap capacitor that supplements C
B
during “clipping” events, which result in a
reduction in the average switching frequency.
Bootstrap resistor that limits C
BAUX
charging current during TA2022 power up (bootstrap
supply charging).
VN10 generator filter capacitors. The high frequency capacitor (0.1uF) must be located
close to pin 2 (VN10) to maximize device performance. The value of the bulk capacitor
should be sized appropriately such that the VN10 voltage does not overshoot with
respect to VNN during TA2022 turn on. Tripath recommends using a value of 100 F for
the bulk capacitor.
VN10 generator filter inductor. This inductor sized appropriately so that L
SW
does not
TA2022 – KLI/1.2/07-04
R
I
R
F
C
I
R
FBA
R
FBB
R
FBC
C
FB
R
OFA
R
OFB
R
REF
C
A
D
B
C
B
C
BAUX
R
B
C
SW
L
SW
8
DSP 与 ARM 处理器
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