MX631
Features
•
•
•
•
•
DATABULLETIN
LOW VOLTAGE SPM DETECTOR
Detects 12 & 16kHz SPM Frequencies
Low Power (3.0 Volt
MIN
<1.0mA) Operation
High Speechband Rejection Properties
Tone-Follower and Packet Mode Outputs
Applications
•Complex and/or Simple Telephone Systems
•Call-Charge/-Logging Systems
MX631DW
16-Pin SOIC
MX631P
16-Pin PDIP
XTAL/CLOCK
XTAL/CLOCK
OSCILLATOR
XTAL
CLOCK
OUT
CLOCK IN
CLOCK
DIVIDERS
SYSTEM
V
SS
V
DD
TONE FOLLOWER
OUTPUT
SYSTEM
(12kHz/16kHz)
TONE
FOLLOWER
LOGIC
INPUT AMP
12kHz/16kHz
SIGNAL
IN (+)
AMP OUT
V
BIAS
Figure 1 - Functional Block Diagram
Description
The MX631 is a low-power, system-selectable
Subscriber Pulse Metering (SPM) detector that indicates
the presence of both 12kHz or 16kHz telephone call-
charge frequencies on a telephone line.
Deriving its input directly from the telephone line,
input amplitude/sensitivities are component adjustable
to the user's national ‘Must/Must-Not Decode’
specifications via an on-chip input amplifier, while the
12kHz and 16kHz frequency limits are accurately
defined by the use of an external 3.579545MHz
telephone-system Xtal or clock-pulse input.
The MX631, which demonstrates high 12kHz and
16kHz performance in the presence of both voice and
noise, can operate from either a single or differential
analog signal input from which it will produce two
individual logic outputs:
1. Tone Follower Output - A 'tone-following' logic
output producing a “Low” level for the period of a
correct decode and a “High” level for a bad decode
or N
OTONE
.
2. Packet (Cumulative Tone) Mode Output - To
respond and/or de-respond after a cumulative
40ms of good tone (orN
OTONE
) in any 48ms period.
This process will ignore small fluctuations or fades
of a valid frequency input and is available for
µProcessor
‘Wake-Up’, Minimum Tone detection,
N
OTONE
indication or transient avoidance.
This system (12kHz/16kHz) selectable integrated
circuit, which may be line-powered, is available in 16-pin
plastic DIP and SOIC surface mount packages.
© 1997 MX•COM, INC.
www.mxcom.com Tele: 800 638 5577 910 744 5050 Fax: 910 744 5054
Doc.# 20480087.003
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA
All trademarks and service marks are held by their respective companies
+
-
SIGNAL
IN (-)
32
1
LEVEL DETECTOR
DIVIDER
PERIOD
MEASURE
PACKET MODE
OUTPUT
PACKET
TONE
LOGIC
+20dB
SYSTEM
Low Voltage SPM Detector
2
MX631
Pin
1
Function
Xtal/Clock :
The input to the on-chip clock oscillator; for use with a 3.579545MHz Xtal in
conjunction with the Xtal output (see Figure 2). Circuit components are on-chip. Using this mode of
clock operation, the Clock Out pin should be connected directly to the Clock In pin. If a clock pulse
input is employed to the Clock In pin, this pin must be connected directly to V
DD
(see Figure 2).
Xtal:
The output of the on-chip clock oscillator inverter.
Clock Out:
The buffered output of the on-chip clock oscillator inverter. If a Xtal input is employed
this output should be connected directly to the Clock In pin.
Clock In:
The 3.579545MHz clock pulse input to the internal clock-dividers. In the clock pulse input
mode the Xtal/Clock input (pin 1) should be connected to V
DD
. (See Figure 2.)
No internal connection, leave open circuit.
No internal connection, leave open circuit.
V
BIAS
:
The output of the on-chip analog bias circuitry. Held internally at V
DD
/2, this pin should be
decoupled to V
SS
(see Figure 2).
V
SS
:
Negative supply (GND).
Signal In (+):
Signal In (-):
Amp Out:
The positive and negative inputs to, and the output from,
the input gain adjusting signal amplifier. Refer to Figure 4
for guidance on setting level sensitivities to national specifications,
and the selection of gain adjusting components.
2
3
4
5
6
7
8
9
10
11
12
13
No internal connection, leave open circuit.
Tone Follower Output:
This output provides a logic “0” (Low) for the period of a detected tone and
a logic “1” (High) for N
OTONE
detection. See Figure 5.
Packet Mode Output:
A logic output that will be available after a cumulation of 40ms of 'good' tone
has been received. This packet tone follower will only respond when a tone frequency of sufficient
quality has been received for sufficient time, i.e. a cumulation of 40ms in any 48ms; short tone
bursts or breaks will be ignored. This output provides a logic “0” (Low) for a detected tone and a
logic “1” (High) for N
OTONE
detection. See Figure 6.
System:
The logic input to select device operation to either 12kHz (logic “1” - High) or 16kHz (logic
“0” - Low) SPM systems. This input has an internal 1MΩ pullup resistor (12kHz).
V
DD
:
Positive supply. A single, stable power supply is required. Critical levels and voltages within the
MX631 are dependent upon this supply. This pin should be decoupled to V
SS
by a capacitor mounted
close to the pin.
Note that if this device is ‘line’ powered, the resulting supply must be stable. See notes on IC
Protection from high and spurious line voltages.
14
15
16
© 1997 MX•COM, INC.
www.mxcom.com Tele: 800 638 5577 910 744 5050 Fax: 910 744 5054
Doc.# 20480087.003
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA
All trademarks and service marks are held by their respective companies
Low Voltage SPM Detector
3
MX631
Application Information:
External Components
V
DD
V
DD
XTAL/CLOCK
XTAL/CLOCK
X
1
XTAL
CLOCK OUT
V
DD
1
2
3
4
5
16
SYSTEM
C
1
PACKET MODE OUTPUT
For use with a Clock-Pulse Input
- Remove Xtal (X1)
- Connect Pin 1 to VDD
- Remove link (Pins 3-4)
- Input clock pulses to CLOCK IN
15
14
TONE FOLLOWER OUTPUT
CLOCK IN
CLOCK IN
MX631
13
12
11
10
V
BIAS
V
SS
6
7
8
AMP OUT
SIGNAL IN (-)
SIGNAL IN (+)
R
1
C
3
R
2
R
3
C
4
9
R
4
C
2
Figure 2 - Recommended External Components - Differential Input Mode
Component
R
1
R
2
R
3
R
4
C
1
C
2
C
3
C
4
X
1
Value
R
FEEDBACK
R
IN (-)
R
IN (+)
R
BIAS
1.0µF ±20%
1.0µF ±20%
C
IN(-)
C
IN(+)
3.579545MHz
External Components
1. The values of the Input Amp gain components
illustrated are calculated using the Input Gain
Calculation Graph (Figure 4).
When calculating input gain components, for
correct operation, it is recommended that the
values of resistors R
1
and R
4
do not go below
100kΩ.
2. Refer to following pages for advice on IC
Protection from high and spurious line voltages.
Differential Input
Common Mode Input
INPUT AMP
INPUT AMP
Ring (b)
MX631
V
BIAS
V
BIAS
Figure 3 - Example Input Configurations
© 1997 MX•COM, INC.
www.mxcom.com Tele: 800 638 5577 910 744 5050 Fax: 910 744 5054
Doc.# 20480087.003
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA
All trademarks and service marks are held by their respective companies
+
MX631
-
+
-
Tip (a)
Low Voltage SPM Detector
4
MX631
Application Information ......
25
15
MAXIMUM AMPLIFIER GAIN
MIMIMUM AMPLIFIER GAIN
-10
-5
0
5
AMPLIFIER GAIN (dB)
V
DD
= 3.3 (±0.1) VOLTS
10
TEMP = -40° to +85°C
20
Application Information ......
SIGNAL LEVELS (dB) 0dB ref: 775mVrms
© 1997 MX•COM, INC.
www.mxcom.com Tele: 800 638 5577 910 744 5050 Fax: 910 744 5054
Doc.# 20480087.003
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA
All trademarks and service marks are held by their respective companies
Figure 4 - Input Gain Calculation Graph
MUST-NOT-DECODE LEVEL
MUST-DECODE LEVEL
-10
-15
-20
-25
-30
-35
-40
-45
-50
-25
-20
-15
Low Voltage SPM Detector
5
MX631
Application Information ......
Input Gain Calculation
The input amplifier, with its external circuitry, is
provided on-chip to set the sensitivity of the MX631 to
conform to the user's national level specification with
regard to ‘Must’ and ‘Must-Not’ decode signal levels.
With reference to Figure 4, the following steps will
assist in the determination of the required gain/
attenuation.
Step 1
Draw two horizontal lines from the Y-axis (Signal
Levels (dB)). The upper line represents your
required ‘Must’ decode level. The lower line
represents your required ‘Must-Not’ decode level.
Step 2
Mark the intersection of the upper horizontal line
and the upper sloping line; drop a vertical line from
this point to the X-axis (Amplifier Gain (dB)).
The point where the vertical line meets the X-axis
indicates the MINIMUM Input Amp gain required for
reliable decoding of valid signals.
Step 3
Mark the intersection of the lower horizontal line
and the lower sloping line; drop a vertical line from
this point to the X-axis.
The point where the vertical line meets the X-axis
indicates the MAXIMUM allowable Input Amp gain.
Input signals at or below the ‘Must-Not’ decode
level will not be detected as long as the amplifier gain
is no higher than this level.
Input Gain Components
The following paragraphs refer to the gain
components shown in Figures 2 and 3.
The user should calculate and select external
components (R
1
, R
2
/C
3
, R
3
/C
4
, R
4
) to provide an amplifier
gain within the limits obtained in Steps 2 and 3.
Component tolerances should not move the gain-
figure outside these limits.
It is recommended that the designed gain is near the
center of the calculated range. The graph in Figure 4 is
for calculations for the input gain components for an
MX631 using a V
DD
of 3.3 (±0.1) volts.
Use this area to keep a permanent record
of your calculated gains and components
Implementation Notes
Aliasing
Due to the switched-capacitor filters employed in the
MX631, be careful to avoid the effects of alias distortion
with the external components you choose.
Possible Alias Frequencies:
12kHz Mode= 52kHz
16kHz Mode= 69kHz
If these alias frequencies are liable to cause problems
and/or interference, it is recommended that anti-alias
capacitors are used across input resistors R
1
and R
4
.
Values of anti-alias capacitors should be chosen to
provide a highpass cutoff frequency, in conjunction with
R
1
(R
4
) of approximately 20kHz to 25kHz (12kHz system)
or 25kHz to 30kHz (16kHz system).
i.e. C =
1
2
x
π
x
f
0
x
R
1
When anti-alias capacitors are used, make allowance for
reduced gain at the SPM frequency (12kHz or 16kHz).
© 1997 MX•COM, INC.
www.mxcom.com Tele: 800 638 5577 910 744 5050 Fax: 910 744 5054
Doc.# 20480087.003
4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA
All trademarks and service marks are held by their respective companies
Signal Input Protection
Telephone systems may have high d.c. and a.c.
voltages present on the line. If the MX631 is part of host
equipment that has its own signal input protection
circuitry, there will be no need for further protection as
long as the voltage on any pin is limited to within V
DD
+
0.3V and V
SS
-0.3V.
If the host system does not have input protection, or
there are signals present outside the device's specified
limits, the MX631 will require protection diodes at its
signal inputs (+ and -). The breakdown voltage of
capacitors and the peak inverse voltage of the diodes
must be sufficient to withstand the sum of the d.c.
voltages plus all expected signal peaks.
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